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FT2232D Datasheet(PDF) 41 Page - Future Technology Devices International Ltd. |
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FT2232D Datasheet(HTML) 41 Page - Future Technology Devices International Ltd. |
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41 / 56 page ![]() DS2232D Version 0.91 © Future Technology Devices International Ltd. 2006 Page 1 of 51 FT2232D Dual USB UART / FIFO I.C. 9.6 Multi-Protocol Synchronous Serial Engine (MPSSE) Mode Signal Descriptions and Interface Configurations MPSSE Mode is designed to allow the FT2232D to interface efficiently with synchronous serial protocols such as JTAG and SPI Bus. It can also be used to program SRAM based FPGA’s over USB. The MPSSE interface is designed to be flexible so that it can be configured to allow any synchronous serial protocol (industry standard or proprietary) to be interfaced to the FT2232D. MPSSE is available on channel A only. MPSSE is fully configurable, and is programmed by sending commands down the data pipe. These can be sent individually, or more efficiently in packets. MPSSE is capable of a maximum sustained data rate of 5.6 Mega bits / s. When Channel A is configured in MPSSE mode the IO signal lines are configured as follows :- Pin# (Channel A Only) Signal Type Description 24 TCK/SK OUTPUT Clock signal Output 23 TDI/D0 OUTPUT Serial Data Out 22 TDO/DI INPUT Serial Data In **Note 2 21 TMS/CS OUTPUT Select Signal Out 20 GPIOL0 I/O General Pupose input / Output **Note 2 19 GPIOL1 I/O General Pupose input / Output **Note 2 17 GPIOL2 I/O General Pupose input / Output **Note 2 16 GPIOL3 I/O General Pupose input / Output **Note 2 15 GPIOH0 I/O General Pupose input / Output **Note 2 13 GPIOH1 I/O General Pupose input / Output **Note 2 12 GPIOH2 I/O General Pupose input / Output **Note 2 11 GPIOH3 I/O General Pupose input / Output **Note 2 **Note 2 : In Input Mode, these pins are pulled to VCCIO via internal 200K resistors. These can be programmed to gently pull low during USB suspend ( PWREN# = “1” ) by setting this option in the EEPROM. Enabling MPSSE mode is enabled using Set Bit Bang Mode driver command. A hex value of 2 will enable it, and a hex value of 0 will reset the device. See application note AN2232L-02, “Bit Mode Functions for the FT2232D” for more details and examples. The MPSSE command set is fully described in application note AN2232L-01 - “Command Processor For MPSSE and MCU Host Bus Emulation Modes”. |
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