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CS8420-CSZ Datasheet(PDF) 73 Page - Cirrus Logic |
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CS8420-CSZ Datasheet(HTML) 73 Page - Cirrus Logic |
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73 / 94 page ![]() DS245F4 73 CS8420 AES3/SPDIF Receiver Interface: RXP, RXN - Differential Line Receiver Inputs Differential line receiver inputs, carrying AES3 type data. RMCK - Input Section Recovered Master Clock Output Input section recovered master clock output. Will be at a frequency of 256x the input sample rate (Fsi). RERR - Receiver Error Indicator When high, indicates a problem with the operation of the AES3 receiver. The status of this pin is updated once per sub-frame of incoming AES3 data. Conditions that cause RERR to go high are: validity, parity error, and bi-phase coding error, as well as loss of lock in the PLL. NVERR - No Validity Receiver Error Indicator When high, indicates a problem with the operation of the AES3 receiver. The status of this pin is updated once per frame of incoming AES3 data. Conditions that cause NVERR to go high are: parity error, and bi-phase coding error, as well as loss of lock in the PLL. EMPH - Pre-emphasis Indicator Output EMPH is low when the incoming AES3 data indicates the presence of 50/15 μs pre-emphasis. When the AES3 data indicates the absence of pre-emphasis or the presence of non 50/15 μs pre-emphasis EMPH is high. This is also a start-up option pin, and requires a pull-up or pull-down resistor. COPY - Copy Channel Status Bit Output The COPY pin reflects the state of the COPY Channel Status bit in the incoming AES3 type data stream. ORIG - Original Channel Status Output SCMS generation indicator. This is decoded from the incoming category code and the L bit. A low output indicates that the audio data stream is 1st generation or higher. A high indicates that the audio data stream is original. This is also a start-up option pin, and requires a pull-up or pull-down resistor. PRO - Professional Channel Status Bit Output The PRO pin reflects the state of the Professional/Consumer Channel Status bit in the incoming AES3 type data stream. AUDIO - Audio Channel Status Bit Output The AUDIO pin reflects the state of the audio/non audio Channel Status bit in the incoming AES3 type data stream. RCBL - Receiver Channel Status Block Output RCBL indicates the beginning of a received channel status block. RCBL goes high 2 frames after the reception of a Z preamble, remains high for 16 frames while COPY, ORIG, AUDIO, EMPH and PRO are updated, and returns low for the remainder of the block. RCBL changes on rising edges of RMCK. CHS - Channel Select Input Selects which sub-frame’s channel status data is output on the EMPH, COPY, ORIG, PRO and AUDIO pins. Chan- nel A is selected when CHS is low, channel B is selected when CHS is high. U - User Data Output The U pin outputs user data from the AES3 receiver, clocked by rising and falling edges of OLRCK. C - Channel Status Data Output The C pin outputs channel status data from the AES3 receiver, clocked by rising and falling edges of OLRCK. |
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