PLL1707 datasheet(5/25 Pages) TI2

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PLL1707

PLL1708

SLES065 – DECEMBER 2002

www.ti.com

PLL1707 Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

AGND

–

Analog ground

CSEL

SCKO1 frequency selection control(1)

DGND1

–

Digital ground 1

DGND2

–

Digital ground 2

DGND3

–

Digital ground 3

FS1

Sampling frequency group control 1(1)

FS2

Sampling frequency group control 2(1)

MCKO1

27-MHz master clock output 1

MCKO2

27-MHz master clock output 2

SCKO0

System clock output 0 (33.8688 MHz fixed)

SCKO1

System clock output 1 (selectable for 48 kHz)

SCKO2

System clock output 2 (256 fS selectable)

SCKO3

System clock output 3 (384 fS selectable)

Sampling rate control(1)

VCC

–

Analog power supply, 3.3 V

VDD1

–

Digital power supply 1, 3.3 V

VDD2

–

Digital power supply 2, 3.3 V

VDD3

–

Digital power supply 3, 3.3 V

XT1

27-MHz crystal oscillator, or external clock input

XT2

27-MHz crystal oscillator, must be OPEN for external clock input mode

(1) Schmitt-trigger input with internal pulldown.

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