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L9848 Datasheet(PDF) 17 Page - STMicroelectronics

Part # L9848
Description  Octal configurable low/high side driver
PDF  27 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9848 Datasheet(HTML) 17 Page - STMicroelectronics

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L9848
Functional description
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3.6
SPI DI input command register
An input byte (8 bits) is routed to the Command Register. The content of this Command
Register is given in Table 8 and Table 9. Additional DI data will continue to be wrapped
around to the DO pin. If CS will go low before a complete reception of the current byte, this
just transmitted byte will be ignored
3.7
Fault operation
The fault diagnostic capability consists of one internal 8bit shift register. Open or shorted
load detection is provided by comparing the source or drain voltage with the VDD voltage.
When an output connected as either a low side device or a high side device is commanded
OFF, an open load can be detected. When an output connected as either a low side device
or a high side device is commanded ON a shorted load can be detected.
The fault bit is "set" for each channel if a short, open, or over-temperature condition occurs
for Outputs1-8. The content of this Fault Register is given in Table 10.
The output load status of each individual channel is defined in Table 11. Open and shorts
are subsequently re-latched provided they meet the minimum duration criterion and thermal
faults will be re-latched provided they meet the duration criterion after CS goes "LOW", if
these fault conditions are still present.
The fault register is capable of detecting and latching multiple fault conditions (among the 8
outputs) that have occurred between clearing of the fault flags.
All of the faults will be cleared on the falling edge of Chip Select (CS).
Table 8.
Bit command register definition
MSB
LSB
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
D07D06
D05D04
D03D02
D01
D00
Table 9.
Command register logic definition
Bit
State
Status
D00-D07
0
OUTPUT1-8 are commanded OFF
D00-D07
1
OUTPUT1-8 are commanded ON
Table 10.
Fault register definition
MSB
LSB
Fault8
Fault7
Fault6
Fault5
Fault4
Fault3
Fault2
Fault1
D07
D06
D05
D04
D03
D02
D01
D00
Table 11.
Fault logic definition
BIT
STATE
STATUS
Fault1-8
0
OUT1-8 are not open or shorted (nominal)
Fault1-8
1
OUT1-8 are either open or shorted or in thermal shutdown



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