AT89C5132-ROTIL datasheet(173/182 Pages) ATMEL

173 / 182 page

173

4173E–USB–09/07

AT89C5132

23.3.9.2

Timings

Table 124. External Clock AC Timings

VDD = 2.7 to 3.3V, TA= -40 to +85°C

23.3.9.3

Waveforms

Figure 23-23. External Clock Waveform

Figure 23-24. AC Testing Input/Output Waveforms

Notes:

1. During AC testing, all inputs are driven at

VDD -0.5V for a logic 1 and 0.45V for a logic 0.

2. Timing measurements are made on all outputs at VIH min for a logic 1 and VIL max for a logic 0.

Figure 23-25. Float Waveforms

Note:

For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when a

100 mV change from the loading VOH/VOL level occurs with IOL/IOH = ±20 mA.

Symbol

Parameter

Min

Max

Unit

CLCL

Clock Period

CHCX

High Time

CLCX

Low Time

CLCH

Rise Time

CHCL

Fall Time

Cyclic Ratio in X2 Mode

0.45 V

CLCL

VDD - 0.5

VIH1

CHCX

CLCH

CHCL

CLCX

0.45 V

VDD - 0.5

0.7

VDD

0.3

VDD

IH min

VIL max

INPUTS

OUTPUTS

LOAD

VOH - 0.1V

VOL + 0.1V

VLOAD + 0.1V

VLOAD - 0.1V

Timing Reference Points

AT89C5132-ROTIL Datasheet(PDF) 173 Page - ATMEL Corporation

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