H8SXSLASH1663R datasheet(1280/1504 Pages) RENESAS

1280 / 1504 page

Section 28 Power-Down Modes

Rev. 2.00 Sep. 24, 2008 Page 1248 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

Value

R/W

Module

IOKEEP

R/W

I/O Port Retention

In deep software standby mode, the ports retain the

states that were held in software standby mode. This bit

specifies whether or not the state that has been held in

deep software standby mode is retained after exit from

deep software standby mode.

IOKEEP

Pin State

The retained port states are released

simultaneously with exit from deep

software standby mode.

The retained port states are released

when a 0 is written to this bit following exit

from deep software standby mode.

In operation in external extended mode, however, the

address bus, bus control signals (

CS0, AS, RD, HWR,

and

LWR), and data bus are set to the initial state upon

exit from deep software standby mode.

RAMCUT2 0

R/W

On-chip RAM Power Off 2

RAMCUT 2, 1, and 0 control the internal power supply to

the on-chip RAM and USB in deep software standby

mode. For details, see descriptions of the RAMCUT0 bit.

RAMCUT1 0

R/W

On-chip RAM Power Off 1

RAMCUT 2, 1, and 0 control the internal power supply to

the on-chip RAM and USB in deep software standby

mode. For details, see descriptions of the RAMCUT0 bit.

3 to 1



All 0

R/W

Reserved

These bits are always read as 0. The write value should

always be 0.

RAMCUT0 1

R/W

On-chip RAM Power Off 0

RAMCUT 2, 1, and 0 control the internal power supply to

the on-chip RAM and USB in deep software standby

mode.

RAMCUT 2 to 0

000: Power is supplied to the on-chip RAM and USB.

111: Power is not supplied to the on-chip RAM and USB.

Settings other than above are prohibited.

H8SX/1663R Datasheet(PDF) 1280 Page - Renesas Technology Corp

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