M32CSLASH86 datasheet(264/505 Pages) RENESAS

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Page 241

18. A/D Converter

)

(

Function

A/D0 Control Register 3(1, 2)

Bit Name

Bit

Symbol

Address

After Reset

AD0CON3

039516

XXXX X0002

DUS

MSS

CKS2

MSF0

MSF1

(b7 - b5)

Multi-Port Sweep

Status Flag(8)

DMAC Operation

Select Bit(3)

Multi-Port Sweep

Mode Select Bit

Frequency Select Bit

0 0 : AN0 to AN7

0 1 : AN150 to AN157

1 0 : AN00 to AN07

1 1 : AN20 to AN27

b4 b3

NOTES:

1. When the AD0CON3 register is rewritten during the A/D conversion, the conversion result is

indeterminate.

2. The AD0CON3 may be read uncorrectly during the A/D conversion. It must be read or written after the

A/D converter stops operating.

3. When the MSS bit is set to "1", set the DUS bit to "1".

4. When the DUS bit is set to "1", the AD00 register stores all A/D conversion results.

5. When the DUS bit is set to "1", set the DMAC.

6. When the MSS bit is set to "1", set the MD2 bit in the AD0CON1 register to "0" (other than repeat

sweep mode 1), the APS1 and APS0 bits in the AD0CON2 register to "012" (AN150 to AN157) and the

OPA1 and OPA0 bits in the AD0CON1 register to "002" (ANEX0 and ANEX1 not used).

7. Refer to the note for the CKS0 bit in the AD0CON0 register.

8. The MSF1 and MSF0 bit settings are enabled when the MSS bit is set to "1". Value in the bit is

indeterminate when the MSS bit is set to "0".

Reserved Bit

(Note 7)

Set to "0".

When read, its content is indeterminate.

0 : Disables multi-port sweep mode

1 : Enables multi-port sweep mode(3, 6)

0 : Disables DMAC operating mode

1 : Enables DMAC operating mode(4, 5)

00 0

Figure 18.5 AD0CON3 Register

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