M32CSLASH86 datasheet(262/505 Pages) RENESAS

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Page 239

18. A/D Converter

)

(

Figure 18.3 AD0CON1 Register

Function

A/D0 Control Register 1(1)

Bit Name

Bit

Symbol

Address

After Reset

AD0CON1

039716

0016

SCAN0

SCAN1

MD2

A/D Sweep Pin

Select Bit(2, 10)

(i=none, 0, 2, 15)

Single sweep mode and repeat sweep mode 0

BITS

CKS1

VCUT

OPA1

OPA0

8/10-Bit Mode

Select Bit

External Op-Amp

Connection Mode

Bit(7, 9)

0 : No VREF connection(11)

1 : VREF connection

0 0 : ANEX0 and ANEX1 are not used(8)

0 1 : Signal into ANEX0 is A/D converted

1 0 : Signal into ANEX1 is A/D converted

1 1 : External op-amp connection mode

VREF Connection

Bit

(Note 6)

0 : 8-bit mode

1 : 10-bit mode

A/D Operating

Mode Select Bit 1

0 0 : ANi0, ANi1

0 1 : ANi0 to ANi3

1 0 : ANi0 to ANi5

1 1 : ANi0 to ANi7

0 : Any mode other than repeat sweep mode 1

1 : Repeat sweep mode 1(5)

Frequency Select

Bit

Repeat sweep mode 1(3)

0 0 : ANi0

0 1 : ANi0, ANi1

1 0 : ANi0 to ANi2

1 1 : ANi0 to ANi3

NOTES:

1. When the AD0CON1 register is rewritten during the A/D conversion, the conversion result is

indeterminate.

2. The SCAN1 and SCAN0 bit settings are disabled in single sweep mode, repeat sweep mode 0, repeat

sweep mode 1, mutli-port single sweep mode and multi-port repeat sweep mode 0.

3. This pin is commonly used in the A/D conversion when the MD2 bit is set to "1".

4. In multi-port single sweep mode or multi-port repeat sweep mode 0, do not set the SCAN1 and

SCAN0 bits to any setting other than "112".

5. When the MSS bit in the AD0CON3 register is set to "1" (multi-port sweep mode enabled), set the

MD2 bit to "0".

6. Refer to the note for the CKS0 bit in the AD0CON0 register.

7. In one-shot mode and repeat mode, the OPA1 and OPA0 bits can be set to "012" or "102" only. Do not

set the OPA0 and OPA1 bits to "012" or "102" in other modes.

8. To set the OPA1 and OPA0 bits to "002", set the PSL3_5 bit in PSL3 register to "0" (other than

ANEX0) and the PSL3_6 bit to "0" (other than ANEX1).

9. When the MSS bit is set to "1", set the OPA1 and OPA0 bits to "002".

10. AVCC=VREF=VCC, AD input voltage (for AN0 to AN7, AN00 to AN07, AN20 to AM27, AN150 to AN157,

ANEX0, ANEX1)

≤ VCC.

11. Do not set the VCUT bit to "0" during the A/D conversion.

VREF is a reference voltage for AD0 only. The VCUT bit setting does not affect the VREF performance

of the D/A converter.

Multi-port single sweep mode and

multi-port repeat sweep mode 0(4)

1 1 : ANi0 to ANi7

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