MPC5200B_10 datasheet(25/72 Pages) FREESCALE

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MPC5200B Data Sheet, Rev. 4

Freescale Semiconductor

Figure 11. Timing Diagram—Non-MUXed Mode

1.3.8.2

Burst Mode

Table 25. Burst Mode Timing

Sym

Description

Min

Max

Units Notes SpecID

tCSA

PCI CLK to CS assertion

4.6

10.6

—

A7.22

tCSN

PCI CLK to CS negation

2.9

7.0

—

A7.23

CS pulse width

(1 + WS + 4LB ×2

×(32/DS))×tPCIck

(1 + WS + 4LB ×2×

(32/DS)) × tPCIck

(1),(2)

A7.24

ADDR valid before CS assertion

tIPBIck

tPCIck

—

A7.25

ADDR hold after CS negation

–0.7

—ns

—

A7.26

OE assertion before CS assertion

—4.8

—

A7.27

OE negation before CS negation

—2.7

—

A7.28

RW valid before CS assertion

tPCIck

—ns

—

A7.29

RW hold after CS negation

tPCIck

—ns

—

A7.30

DATA setup before rising edge of

PCI clock

3.6

—ns

—

A7.31

ADDR

DATA (rd)

CS[x]

R/W

DATA (wr)

t10

t11

TSIZ[1:2]

t17

t16

ACK

t12

t13

t14

t15

PCI CLK

t18

t19

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