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STM32L151VD Datasheet(PDF) 84 Page - STMicroelectronics |
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STM32L151VD Datasheet(HTML) 84 Page - STMicroelectronics |
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84 / 140 page ![]() Electrical characteristics STM32L151xD STM32L152xD 84/140 Doc ID 022027 Rev 6 Figure 18. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms 1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used. Table 37. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings(1) 1. CL = 30 pF. Symbol Parameter Min Max Unit tw(NE) FSMC_NE low time THCLK -2 THCLK ns tv(NOE_NE) FSMC_NEx low to FSMC_NOE low 0 2 ns tw(NOE) FSMC_NOE low time THCLK THCLK - 1 ns th(NE_NOE) FSMC_NOE high to FSMC_NE high hold time 0 - ns tv(A_NE) FSMC_NEx low to FSMC_A valid - 4 ns th(A_NOE) Address hold time after FSMC_NOE high THCLK + 1.5 - ns tv(BL_NE) FSMC_NEx low to FSMC_BL valid - 0.5 ns th(BL_NOE) FSMC_BL hold time after FSMC_NOE high 2*THCLK - 0.5 - ns tsu(Data_NE) Data to FSMC_NEx high setup time THCLK -ns tsu(Data_NOE) Data to FSMC_NOEx high setup time THCLK -ns th(Data_NOE) Data hold time after FSMC_NOE high 0 - ns th(Data_NE) Data hold time after FSMC_NEx high 0 - ns tv(NADV_NE) FSMC_NEx low to FSMC_NADV low - 2 ns tw(NADV) FSMC_NADV low time - THCLK ns NBL Data FSMC_NEx FSMC_NBL[1:0] FSMC_D[15:0] tv(BL_NE) th(Data_NWE) FSMC_NOE Address FSMC_A[25:0] tv(A_NE) tw(NWE) FSMC_NWE tv(NWE_NE) t h(NE_NWE) th(A_NWE) th(BL_NWE) tv(Data_NE) tw(NE) ai14990 FSMC_NADV(1) t v(NADV_NE) tw(NADV) |
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