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STM32L151VD Datasheet(PDF) 24 Page - STMicroelectronics |
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STM32L151VD Datasheet(HTML) 24 Page - STMicroelectronics |
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24 / 140 page ![]() Functional overview STM32L151xD STM32L152xD 24/140 Doc ID 022027 Rev 6 3.7 Memories The STM32L15xxD devices have the following features: ● 48 Kbytes of embedded RAM accessed (read/write) at CPU clock speed with 0 wait states. With the enhanced bus matrix, operating the RAM does not lead to any performance penalty during accesses to the system bus (AHB and APB buses). ● The non-volatile memory is divided into three arrays: – 384 Kbytes of embedded Flash program memory – 12 Kbytes of data EEPROM – Options bytes Flash program and data EEPROM are divided into two banks, this enables writing in one bank while running code or reading data in the other bank. The options bytes are used to write-protect the memory (with 4 KB granularity) and/or readout-protect the whole memory with the following options: – Level 0: no readout protection – Level 1: memory readout protection, the Flash memory cannot be read from or written to if either debug features are connected or boot in RAM is selected – Level 2: chip readout protection, debug features (Cortex-M3 JTAG and serial wire) and boot in RAM selection disabled (JTAG fuse) The whole non-volatile memory embeds the error correction code (ECC) feature. 3.8 FSMC (flexible static memory controller) The FSMC supports the following modes: SRAM, PSRAM, NOR/OneNAND Flash. Functionality overview: ● Up to 26 bit address bus ● Up to 16-bit data bus ● Write FIFO ● Burst mode ● Code execution from external memory ● Four chip select signals ● Up to 32 MHz external access 3.9 DMA (direct memory access) The flexible 12-channel, general-purpose DMA is able to manage memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports circular buffer management, avoiding the generation of interrupts when the controller reaches the end of the buffer. Each channel is connected to dedicated hardware DMA requests, with software trigger support for each channel. Configuration is done by software and transfer sizes between source and destination are independent. The DMA can be used with the main peripherals: SPI, I2C, USART, SDIO, general-purpose timers, DAC and ADC. |
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