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AT90PWM2 Datasheet(PDF) 79 Page - ATMEL Corporation |
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AT90PWM2 Datasheet(HTML) 79 Page - ATMEL Corporation |
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79 / 365 page ![]() 79 4317K–AVR–03/2013 AT90PWM2/3/2B/3B • XTAL1/OC0B – Bit 1 XTAL1: Chip clock Oscillator pin 1. Used for all chip clock sources except internal calibrated RC Oscillator. When used as a clock pin, the pin can not be used as an I/O pin. OC0B, Output Compare Match B output: This pin can serve as an external output for the Timer/Counter0 Output Compare B. The pin has to be configured as an output (DDE1 set “one”) to serve this function. This pin is also the output pin for the PWM mode timer function. • RESET/OCD – Bit 0 RESET, Reset pin: When the RSTDISBL Fuse is programmed, this pin functions as a normal I/O pin, and the part will have to rely on Power-on Reset and Brown-out Reset as its reset sources. When the RSTDISBL Fuse is unprogrammed, the reset circuitry is connected to the pin, and the pin can not be used as an I/O pin. If PE0 is used as a reset pin, DDE0, PORTE0 and PINE0 will all read 0. Table 11-13 relates the alternate functions of Port E to the overriding signals shown in Figure 11-5 on page 67. Table 11-13. Overriding Signals for Alternate Functions in PE2..PE0 Signal Name PE2/ADC0/ XTAL2 PE1/OC0B PE0/RESET/ OCD PUOE 0 0 0 PUOV 0 0 0 DDOE 0 0 0 DDOV 0 0 0 PVOE 0 OC0Ben 0 PVOV 0 OC0B 0 DIEOE ADC0D 0 0 DIEOV 0 0 0 DI AIO Osc Output ADC0 Osc / Clock input |
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