TS80C58X2_14 datasheet(20/62 Pages) ATMEL

20 / 62 page

4431E–8051–04/06

AT/TS8xC54/8X2

Figure 9-3.

UART Timings in Modes 2 and 3

9.1.1

Automatic Address Recognition

The automatic address recognition feature is enabled when the multiprocessor communication

feature is enabled (SM2 bit in SCON register is set).

Implemented in hardware, automatic address recognition enhances the multiprocessor commu-

nication feature by allowing the serial port to examine the address of each incoming command

frame. Only when the serial port recognizes its own address, the receiver sets RI bit in SCON

frames addressed to other devices.

If desired, you may enable the automatic address recognition feature in mode 1. In this configu-

ration, the stop bit takes the place of the ninth data bit. Bit RI is set only when the received

command frame address matches the device’s address and is terminated by a valid stop bit.

To support automatic address recognition, a device is identified by a given address and a broad-

cast address.

NOTE: The multiprocessor communication and automatic address recognition features cannot

be enabled in mode 0 (i.e. setting SM2 bit in SCON register in mode 0 has no effect).

9.1.2

Given Address

Each device has an individual address that is specified in SADDR register; the SADEN register

is a mask byte that contains don’t-care bits (defined by zeros) to form the device’s given

address. The don’t-care bits provide the flexibility to address one or more slaves at a time. The

following example illustrates how a given address is formed.

To address a device by its individual address, the SADEN mask byte must be 1111 1111b.

For example:

SADDR

0101 0110b

SADEN

1111 1100b

Given

0101 01XXb

SMOD0=0

Data byte

Ninth

bit

Stop

bit

Start

bit

RXD

SMOD0=1

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