Application code structure

AN4231

10/22

DocID024130 Rev 2

3

Application code structure

This section gives an overview of the application code implemented to test the enter/exit of

the STANDBY mode from FLASH to RAM using the Z4 core. It is also discussed how to

change the core during the STANDBY exit and, in case of Z4 core, how to configure the

system memory in order to be available in VLE mode for the core.

Figure 4 explains the application execution starting from a Power on Reset till the jump to

the code in RAM or in FLASH. In relation to this the core chooses an MMU init function unit

which is added in order to manage the memory section for the core Z4.

Figure 4. Diagram flow of application code implemented

3.1

Peripheral used



Device: SPC564xB/C



System clock: 120 MHz by PLL initialization



CGM (Clock Generation Module): PLL is configured as system clock



RGM (Reset Generation Module): set the status at the STANDBY exit



WKUP (Wake Up Unit): set an input pin to exit from STANDBY



ME: Mode entry in order to enter in STANDBY mode

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