LTC4240IGN datasheet(18/28 Pages) LINER

18 / 28 page

LTC4240

4240f

TIMER

5V/DIV

GATE

5V/DIV

12VOUT

10V/DIV

VEEOUT

10V/DIV

5VOUT

10V/DIV

3VOUT

10V/DIV

BD_SEL#

5V/DIV

FAULT

5V/DIV

10ms/DIV

4240 F06

Figure 6. Power-Up into a Short on 3.3V Output

Timer

During a power-up sequence, an 11.5

µA current source is

connected to the TIMER pin (Pin 5) and charges up the

external TIMER pin capacitor. Current limit faults are

ignored until the TIMER voltage ramps to 5.5V. This feature

allows the LTC4240 to power-up CPCI boards with widely

varying capacitive loads on the back end supplies. The

power-up time for either of the two outputs under current

limit conditions is given by the slower of:

tXV

CXV

GATE

CXV

OUT

LOAD XVOUT

OUT

LIMIT XVOUT

LOAD XVOUT

OUT

()

•

–

()

Where XVOUT = 5VOUT or 3VOUT. The timer period should

be set longer than the maximum supply turn-on time but

short enough to not exceed the maximum safe operating

area of the pass transistor during a short-circuit. VTH is the

threshold voltage of the external power FET (2V – 3V). The

timer period will be:

TIMER

•

11 5

(3)

The TIMER pin is immediately pulled low when either

OFF/ON (Pin 28) or Bit 2 of command latch (C2) goes high.

The TIMER pin also functions as a temporary auxiliary

supply for 12VIN. In the event of a large (greater than 1V)

glitch on 12VIN, the energy stored on the timer capacitor

is used as substitute 12VIN power. This improves the

glitch immunity of the LTC4240.

Thermal Shutdown

The internal switches for the 12V and –12V supplies are

protected by current limit and thermal shutdown circuits.

When the temperature of the die reaches 150

°C, all four

switches will be latched off and the FAULT pin (Pin 7) will

be pulled low. Since there is no automatic retry, power will

have to be cycled with the OFF/ON pin or the I2C command

latch.

Short-Circuit Protection

In order to lower power dissipation in the pass transistors

and to mitigate voltage spikes on the supplies during

short-circuit conditions, the current limit on each supply

is designed to be a function of the output voltage. As the

output voltage drops, the current limit decreases. Unlike a

traditional circuit breaker function where huge currents

can flow before the breaker trips, the current foldback

feature lowers short-circuit current by at least 50% when

powering up into a short.

If any supply is in current limit after the TIMER pin voltage

has ramped to 5.5V, then all four pass transistors will be

immediately turned off and FAULT will be asserted low

(Figure 6).

APPLICATIO S I FOR ATIO

LTC4240IGN Datasheet(PDF) 18 Page - Linear Technology

LTC4240IGN Datasheet(HTML) 18 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL