LTC4240IGN datasheet(24/28 Pages) LINER

24 / 28 page

LTC4240

4240f

PRSNT1#

PRSNT2#

Expansion Configuration

Open

No plug in board present

Ground

10k Pull-Up

Plug-in board present,

maximum power consumption

10k Pull-Up

Ground

Plug-in board present,

nominal power consumption

Ground

Plug-in board present,

minimum power consumption

Other CompactPCI Applications

If no 3.3V supply input is required, Figure 15 illustrates

how the LTC4240 should be configured.

For applications where the BD_SEL# connector pin is

grounded on the backplane, the circuit in Figure 16 allows

the LTC4240 to be reset simply by pressing a pushbutton

switch on the CPCI plug-in board. This arrangement

allows for manual resetting of the LTC4240’s circuit break-

ers.

Input Transient Protection

Hot-plugging a board into a backplane generates inrush

currents from the backplane power supplies. This is due to

the charging of the plug-in board bulk capacitance. To

reduce this transient current to a safe level, the CPCI Hot

Swap specification restricts the amount of unswitched

capacitance used on the input side of the plug-in board.

Each pin connected to the CPCI female connector on the

plug-in board is allowed at most 0.01

µF/pin. Bulk capaci-

tors are only allowed on the switched output side of the

LTC4240 (5VOUT, 3VOUT, 12VOUT, VEEOUT). Some bulk

capacitance is allowed on the Early Power planes, but only

because a current limiting resistor is assumed to separate

the connector from the bulk capacitor. Circuits normally

placed on the unswitched Early Power (PCI Bridge, for

example) need to have a current limiting resistor.

APPLICATIO S I FOR ATIO

The assumption by the CompactPCI specification is that

there is a diode to 3.3V on the circuit that is driving the

BD_SEL# pin. The 1.2k resistor pull up to 5VIN on the plug-

in card will thus be clamped by the diode to 3.3V. If the

BD_SEL# pin is being driven high, the actual voltage on the

pin will be approximately 3.9V. This is still above the high

TTL threshold of the LTC4240 OFF/ON pin, but low enough

for Q4 to disable the bus switches and thus remove the 10k

resistors from the I/O lines. Note that BD_SEL# is ordi-

narily connected to V(I/O), which in turn is allowed to be

driven by either 3.3V or 5V. For applications such as

shown in Figure 14, the pull up on BD_SEL# is restricted

to the long 5V pins. A bus switch with no internal diode to

VDD is preferred. Since the power to the bus switch is

derived from one of the unswitched power planes, a 100

Ω

resistor plus a 0.1

µF bypass capacitor should be placed in

series with its power supply.

When the plug-in card is removed from the connector, the

BD_SEL# connection is broken first, and the BD_SEL#

voltage pulls up to 5V. This causes Q4 to turn off, which re-

enables the bus switch, and the precharge resistors are

again connected to the LTC4240 PRECHARGE pin for the

remainder of the board extraction process.

The LTC4240 BE pin can alternatively be used to drive the

enable input of the bus switch. The BE signal would then

keep the I/O lines precharged until all supplies reached

power good status. The resistor in series with the

PRECHARGE pin protects the internal circuitry from large

voltage transients during live insertion.

PRSNT1#, PRSNT2#

PRSNT1# and PRSNT2# are PCI signals that convey the

plug-in board’s power consumption information. These

pins should either be shorted to ground or be connected

to Early Power with a 10k resistor. The voltage levels (TTL)

at the PRSNT#1, 2 pins can be read using the I2C 2-wire

interface.

LTC4240IGN Datasheet(PDF) 24 Page - Linear Technology

LTC4240IGN Datasheet(HTML) 24 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL