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WM9713 Datasheet(PDF) 55 Page - Wolfson Microelectronics plc |
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WM9713 Datasheet(HTML) 55 Page - Wolfson Microelectronics plc |
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55 / 111 page ![]() Preliminary Technical Data WM9713L 1 PTD, March 2004, Rev 2.2 55 Figure 15 Typical Output Configuration The presence of a headphone can be detected using one of GPIO1/6/7/8 (pins 44, 3, 11 & 12) and an external pull-up resistor (see “Applications Information” section for a circuit diagram). When the jack is inserted the GPIO is pulled low by a switch on the socket. When the jack is removed the GPIO is pulled high by a resistor. If the JIEN bit is set, the WM9713L automatically switches between headphone and any other output configuration, typically ear speaker or stereo speaker that has been set up in the Powerdown and Output PGA Mux Select registers. Note: The GPIO polarity can be inverted by setting register 4Eh. In addition to the typical configuration explained above the WM9713L can also support automatic switching between the following three configurations set as BTL ear speaker and headphone. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 24h Output Volume Mapping (Jack Insert) 1:0 EARSPKSEL 00 00: Default, no ear speaker configuration selected. 01: MONO and HPL driver selected as BTL ear speaker. 10: OUT3 and HPL driver selected as BTL ear speaker. 11: OUT4 and HPL driver selected as BTL ear speaker. Table 40 Ear Speaker Configuration For example if OUT4 and HPL is selected as the BTL ear speaker, the user should select EARSPKSEL = 3h, then OUT4 is tri-stated on jack insert to prevent sound across the ear speaker during headphone operation and HPL volume is set to OUT4 volume on jack out to ensure correct ear speaker operation. It should be noted that all other outputs except HPL, HPR and selected ear speaker driver are disabled and internally connected to VREF on jack insert. This maintains VREF at those outputs and helps prevent pops when the outputs are enabled. Finally if the user wishes to DC couple the headphone outputs the user needs to select between OUT3 and OUT4 as the mid-rail output buffer driver. The selected mid-rail output buffer is enabled on jack insert. On jack out it defaults to whatever configuration has been set up in the Powerdown and Output PGA Mux Select registers. |
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