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TNETV1647GSTZWT Datasheet(PDF) 165 Page - Texas Instruments |
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TNETV1647GSTZWT Datasheet(HTML) 165 Page - Texas Instruments |
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165 / 236 page  TMS320DM6441 www.ti.com SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010 Table 6-49. Preview Engine Register Descriptions (continued) HEX ADDRESS RANGE REGISTER ACRONYM DESCRIPTION 0x01C7 0828 AVE Input Formatter/Averager 0x01C7 082C HMED Horizontal Median Filter 0x01C7 0830 NF Noise Filter 0x01C7 0834 WB_DGAIN White Balance Digital Gain 0x01C7 0838 WBGAIN White Balance Coefficients 0x01C7 083C WBSEL White Balance Coefficients Selection 0x01C7 0840 CFA CFA Register 0x01C7 0844 BLKADJOFF Black Adjustment Offset 0x01C7 0848 RGB_MAT1 RGB2RGB Blending Matrix Coefficients 0x01C7 084C RGB_MAT2 RGB2RGB Blending Matrix Coefficients 0x01C7 0850 RGB_MAT3 RGB2RGB Blending Matrix Coefficients 0x01C7 0854 RGB_MAT4 RGB2RGB Blending Matrix Coefficients 0x01C7 0858 RGB_MAT5 RGB2RGB Blending Matrix Coefficients 0x01C7 085C RGB_OFF1 RGB2RGB Blending Matrix Offsets 0x01C7 0860 RGB_OFF2 RGB2RGB Blending Matrix Offsets 0x01C7 0864 CSC0 Color Space Conversion Coefficients 0x01C7 0868 CSC1 Color Space Conversion Coefficients 0x01C7 086C CSC2 Color Space Conversion Coefficients 0x01C7 0870 CSC_OFFSET Color Space Conversion Offsets 0x01C7 0874 CNT_BRT Contrast and Brightness Settings 0x01C7 0878 CSUP Chrominance Suppression Settings 0x01C7 087C SETUP_YC Maximum/Minimum Y and C Settings 0x01C7 0880 SET_TBL_ADDRESS Setup Table Addresses 0x01C7 0884 SET_TBL_DATA Setup Table Data 6.13.1.3 Resizer The resizer module can accept input image/video data from either the preview engine or DDR2. The output of the resizer module is sent to DDR2. The following features are supported by the resizer module. • An output width up to 1280 horizontal pixels. • Input from external DDR2. • Up to 4x upsampling (digital zoom). • Bi-cubic interpolation (4-tap horizontal, 4-tap vertical) can be implemented with the programmable filter coefficients. • Eight phases of filter coefficients. • Optional bi-linear interpolation for the chrominance components. • Up to 1/4x downsampling • 4-tap horizontal and 4-tap vertical filter coefficients (with 8-phases) for 1x to 1/2x downsampling • 1/2x to 1/4x downsampling, for 7-tap mode with 4-phases. • Resizing either YUV 4:2:2 packed data (16-bits) or color separate data (8-bit data within DDR) that is contiguous. • Separate/independent resizing factor for the horizontal and vertical directions. • Upsampling and downsampling ratios that are available are: 256/N, with N ranging from 64 to 1024. • Programmable luminance sharpening after the horizontal resizing and before the vertical resizing step. The resizer register memory mapping is shown in Table 6-50. Copyright © 2006–2010, Texas Instruments Incorporated Peripheral and Electrical Specifications 165 Submit Documentation Feedback Product Folder Link(s): TMS320DM6441 |
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