 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TNETV1647GSTZWT Datasheet(PDF) 100 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TNETV1647GSTZWT Datasheet(HTML) 100 Page - Texas Instruments |
|
|
100 / 236 page  TMS320DM6441 SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010 www.ti.com 6.3.1.4 Power and Sleep Controller (PSC) Module The power and sleep controller (PSC) controls DM6441 device power by turning off unused power domains or gating off clocks to individual peripherals/modules. The PSC consists of a global PSC (GPSC) and a set of Local PSCs (LPSCs). The GPSC contains memory mapped registers, power domain control, PSC interrupt control, and a state machine for each peripheral/module. An LPSC is associated with each peripheral/module and provides clock and reset control. The GPSC controls all of DM6441’s LPSCs. The ARM subsystem does not have an LPSC module. ARM sleep mode is accomplished through the wait for interrupt instruction. The LPSCs for DM6441 are shown in Table 6-5. The PSC Register memory map is given in Table 6-6. For more details on the PSC, see Section 2.8.3, Documentation Support, for the TMS320DM644x DMSoC ARM Subsystem Reference Guide (literature number SPRUE14). Table 6-5. DM6441 LPSC Assignments LPSC Peripheral/Module LPSC Peripheral/Module LPSC Peripheral/Module Number Number Number 0 VPSS DMA 14 EMIFA 28 TIMER1 1 VPSS MMR 15 MMC/SD/SDIO 29 Reserved 2 EDMA3CC 16 Memory Stick/Memory 30 Reserved Stick PRO 3 EDMA3TC0 17 ASP 31 Reserved 4 EDMA3TC1 18 I2C 32 Reserved 5 EMAC 19 UART0 33 Reserved 6 EMAC Memory Controller 20 UART1 34 Reserved 7 MDIO 21 UART2 35 Reserved 8 Reserved 22 SPI 36 Reserved 9 USB 23 PWM0 37 Reserved 10 ATA/CF 24 PWM1 38 Reserved 11 VLYNQ 25 PWM2 39 C64x+ CPU 12 HPI 26 GPIO 40 VICP 13 DDR2 Memory Controller 27 TIMER0 Table 6-6. PSC Register Memory Map REGISTER HEX ADDRESS RANGE DESCRIPTION ACRONYM 0x01C4 1000 PID Peripheral Revision and Class Information Register 0x01C4 1004 - 0x01C4 1014 - Reserved 0x01C4 1018 INTEVAL Interrupt Evaluation Register 0x01C4 101C - 0x01C4 103F - Reserved 0x01C4 1040 MERRPR0 Module Error Pending 0 (mod 0 - 31) Register 0x01C4 1044 MERRPR1 Module Error Pending 1 (mod 32- 63) Register 0x01C4 1048 - 0x01C4 104F - Reserved 0x01C4 1050 MERRCR0 Module Error Clear 0 (mod 0 - 31) Register 0x01C4 1054 MERRCR1 Module Error Clear 1 (mod 32 - 63) Register 0x01C4 1058 - 0x01C4 105F - Reserved 0x01C4 1060 PERRPR Power Error Pending Register 0x01C4 1064 - 0x01C4 1067 - Reserved 0x01C4 1068 PERRCR Power Error Clear Register 0x01C4 106C - 0x01C4 106F - Reserved 0x01C4 1070 EPCPR External Power Error Pending Register 0x01C4 1074 - 0x01C4 1077 - Reserved 0x01C4 1078 EPCCR External Power Control Clear Register 100 Peripheral and Electrical Specifications Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6441 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
British ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
