TNETV1647GSTZWT datasheet(136/236 Pages) TI1

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TMS320DM6441

SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010

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Table 6-31 shows an abbreviation of the set of registers which make up the parameter set for each of

128 EDMA3 events. Each of the parameter register sets consist of eight 32-bit word entries. Table 6-32

shows the parameter set entry registers with relative memory address locations within each of the

parameter sets.

Table 6-31. EDMA3 Parameter Set RAM

HEX ADDRESS RANGE

DESCRIPTION

0x01c0 4000 - 0x01c0 401F

Parameters Set 0 (8 32-bit words)

0x01c0 4020 - 0x01c0 403F

Parameters Set 1 (8 32-bit words)

0x01c0 4040 - 0x01c0 405F

Parameters Set 2 (8 32-bit words)

0x01c0 4060 - 0x01c0 407F

Parameters Set 3 (8 32-bit words)

0x01c0 4080 - 0x01c0 409F

Parameters Set 4 (8 32-bit words)

0x01c0 40A0 - 0x01c0 40BF

Parameters Set 5 (8 32-bit words)

...

0x01c0 4FC0 - 0x01c0 4FDF

Parameters Set 126 (8 32-bit words)

0x01c0 4FE0 - 0x01c0 4FFF

Parameters Set 127 (8 32-bit words)

Table 6-32. Parameter Set Entries

HEX OFFSET ADDRESS

ACRONYM

PARAMETER ENTRY

WITHIN THE PARAMETER SET

0x0000

OPT

Option

0x0004

SRC

Source Address

0x0008

A_B_CNT

A Count, B Count

0x000C

DST

Destination Address

0x0010

SRC_DST_BIDX

Source B Index, Destination B Index

0x0014

LINK_BCNTRLD

Link Address, B Count Reload

0x0018

SRC_DST_CIDX

Source C Index, Destination C Index

0x001C

CCNT

C Count

136

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