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SPC560P50L5 Datasheet(PDF) 57 Page - STMicroelectronics |
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SPC560P50L5 Datasheet(HTML) 57 Page - STMicroelectronics |
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57 / 112 page ![]() SPC560P44Lx, SPC560P50Lx Electrical characteristics Doc ID 14723 Rev 9 57/112 3.5.2 General notes for specifications at maximum junction temperature An estimation of the chip junction temperature, TJ, can be obtained from Equation 1: Equation 1 TJ = TA + (RθJA * PD) where: TA = ambient temperature for the package (°C) RθJA = junction to ambient thermal resistance (°C/W) PD = power dissipation in the package (W) The junction to ambient thermal resistance is an industry standard value that provides a quick and easy estimation of thermal performance. Unfortunately, there are two values in 2. Junction-to-board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for the specified package. 3. Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer. 4. Thermal characterization parameter indicating the temperature difference between the board and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JB. 5. Thermal characterization parameter indicating the temperature difference between the case and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JC. Table 13. Thermal characteristics for 100-pin LQFP Symbol Parameter Conditions Typical value Unit RθJA Thermal resistance junction-to-ambient, natural convection(1) 1. Junction-to-ambient thermal resistance determined per JEDEC JESD51-7. Thermal test board meets JEDEC specification for this package. Single layer board—1s 47.3 °C/ W Four layer board—2s2p 35.3 °C/ W RθJB Thermal resistance junction-to-board(2) 2. Junction-to-board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for the specified package. Four layer board—2s2p 19.1 °C/ W RθJCtop Thermal resistance junction-to-case (top)(3) 3. Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used for the case temperature. Reported value includes the thermal resistance of the interface layer. Single layer board—1s 9.7 °C/ W ΨJB Junction-to-board, natural convection(4) 4. Thermal characterization parameter indicating the temperature difference between the board and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JB. Operating conditions 19.1 °C/ W ΨJC Junction-to-case, natural convection(5) 5. Thermal characterization parameter indicating the temperature difference between the case and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JC. Operating conditions 0.8 °C/ W |
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