ST72361AR4-Auto datasheet(35/279 Pages) STMICROELECTRONICS

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ST72361xx-Auto

Central processing unit

Doc ID 12468 Rev 3

35/279

Figure 8.

CPU registers

4.3.4

Condition code register (CC)

Read/ write

Reset value: 111x1xxx

The 8-bit Condition Code register contains the interrupt masks and four flags representative

of the result of the instruction just executed. This register can also be handled by the PUSH

and POP instructions.

These bits can be individually tested and/or controlled by specific instructions.

Arithmetic management bits

Bit 4 = H Half carry.

This bit is set by hardware when a carry occurs between bits 3 and 4 of the ALU during an

ADD or ADC instructions. It is reset by hardware during the same instructions.

0: No half carry has occurred.

1: A half carry has occurred.

This bit is tested using the JRH or JRNH instruction. The H bit is useful in BCD arithmetic

subroutines.

Bit 2 = N Negative.

This bit is set and cleared by hardware. It is representative of the result sign of the last

arithmetic, logical or data manipulation. It’s a copy of the result 7th bit.

0: The result of the last operation is positive or null.

1: The result of the last operation is negative (that is, the most significant bit

is a logic 1).

ACCUMULATOR

X INDEX REGISTER

Y INDEX REGISTER

STACK POINTER

CONDITION CODE REGISTER

PROGRAM COUNTER

1I1 H I0 N Z

RESET VALUE = RESET VECTOR @ FFFEh-FFFFh

PCH

PCL

RESET VALUE = STACK HIGHER ADDRESS

RESET VALUE = 1X

1 1 X1 XX

RESET VALUE = XXh

X = Undefined Value

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