LR8304 datasheet(10/13 Pages) LRC

10 / 13 page

Assuming the converter does not show double

pulses or pulse bursts on the switch node (SW),

the output

voltage ripple can be calculated as:

where:

IP = Peak current

L = Selected inductor value

IOUT = Nominal load current

fS(IOUT) = Switching frequency at the nominal load

current as calculated previously

Vd = Rectifier diode forward voltage

(typically 0.3 V)

COUT = Selected output capacitor

ESR = Output capacitor ESR value

Input Capacitor Selection

For good input voltage filtering, low ESR ceramic

capacitors are recommended. A 4.7 F ceramic

input capacitor is sufficient for most of the

applications. For better input voltage filtering this

value can be increased.

Diode Selection

To achieve high efficiency a Schottky diode should

be used. The current rating of the diode should

meet the peak current rating of the converter as it

is calculated in the Peak Current Control section.

Use

the

maximum

value

for

ILIM

for

this

calculation.

Layout Considerations

Typical for all switching power supplies, the layout

is an important step in the design, especially at

high peak currents and switching frequencies. If

the layout is not carefully done, the regulator might

show noise problems and duty cycle jitter.

The input capacitor should be placed as close as

possible to the input pin for good input voltage

filtering.B The inductor and diode should be

placed as close as possible to the switch pin to

minimize the noise coupling into other circuits.

Because the feedback pin and network is a

high-impedance circuit, the feedback network

should be routed away from the inductor. The

feedback pin and feedback network should be

shielded with a ground plane or trace to minimize

noise coupling into this circuit.

Wide traces should be used for connections. A

star ground connection or ground plane minimizes

ground shifts and noise.

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