PCD6003 datasheet(11/96 Pages) PHILIPS

11 / 96 page

2001 Apr 17

Philips Semiconductors

Product speciﬁcation

Digital telephone answering machine chip

PCD6003

The line CODEC has 3 inputs which are configurable as

2 single-ended inputs LIFMIN1 and LIFMIN2 that can be

selected by software control, while LIFPIN is AC coupled

to ground. It is also possible to use one of the LIFMIN

inputs (leaving the other unconnected) in conjunction with

the LIFPIN input as a differential input, in case a high

CMRR is required.

The second CODEC is dedicated for a local microphone

and loudspeaker connection (CODEC2). This handsfree

CODEC has a differential low ohmic analog output which

consists of SPKRP and SPKRM. This output can be used

either differential or single ended. The speaker output

impedance and driving level is not suitable to directly

connect a speaker. The handsfree CODEC has a

differential microphone input which consists of MICP and

MICM. This differential input features a fixed 16 dB

microphone preamplifier.

Both the line and handsfree CODEC outputs have on-chip

filtering for out of band signals such that no external filters

are required.

There are 2

× 8-bit analog-to-digital inputs AD0IN and

AD1IN for voltage measurements which can be used for

parallel set detection algorithms or battery control. An 8-bit

DAC output DAOUT can provide an analog peripheral

control signal.

7.3

Overview of functional description

The detailed functional description is divided into separate

chapters covering the major functional blocks, as follows:

Chapter 8 “Power supply, reset and start-up”

Chapter 9 “TICB - generation and selection of system

clocks”

Chapter 10 “The microcontroller”

Chapter 11 “DSP I/O registers”

Chapter 12 “External memory interface”

Chapter 13 “The CODECs”

Chapter 16 “External I/O interfaces”.

POWER SUPPLY, RESET AND START-UP

8.1

Power supply

The PCD6003 core circuitry is supplied by three 3 V supply

pairs. The crystal oscillator and PLL are supplied with a

separate pair of supply pins to provide a ‘clean’ supply

voltage required for low jitter. The following supplies exist:

VDD3V1 and VSS3V1: digital core supply 1 (2.5 V)

VDD3V2 and VSS3V2: digital supply 2 (3.0 V)

VDD3V3 and VSS3V3: digital supply 3 (3.0 V)

VDDA and VSSA: analog supply (2.5 V)

VDDPLL and VSSPLL: crystal clock and PLL supply (2.5 V).

8.2

Reset and start-up

After applying the power supply voltage, the chip will need

an external Power-on reset via pin RSTIN. RSTIN should

remain active (logic 1) until Vtrh and has to become active

again before the power supply drops below Vtrl.

The reset via RSTIN is one of 3 possible ways to perform

a reset. The following reset conditions exist:

• Wake-up from system off (crystal is off, but power is on)

by an external interrupt

• RSTIN, reset in from pin RSTIN

• Watchdog Timer expires.

After a Power-on reset and after a wake-up from system

off, a counter is activated, which guarantees that the first

instruction fetch of the microcontroller is delayed by at

least 4096 clock cycles.

To reduce power consumption during reset, the following

reset strategy is used. If the DSP function is not required,

it can be switched off by the microcontroller. The DSP

reset will then be delayed (until it is switched on again), in

order to avoid a large (reset) power consumption.

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