Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

V62/12615-01XE-R Datasheet(PDF) 46 Page - Texas Instruments

Click here to check the latest version.
Part # V62/12615-01XE-R
Description  PHYTER??Military Temperature Single Port 10/100 Mbps Ethernet Physical Layer Transceiver
PDF  97 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

V62/12615-01XE-R Datasheet(HTML) 46 Page - Texas Instruments

Back Button V62/12615-01XE-R Datasheet HTML 42Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 43Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 44Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 45Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 46Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 47Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 48Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 49Page - Texas Instruments V62/12615-01XE-R Datasheet HTML 50Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 46 / 97 page
background image
46
DP83848-EP
SLLSEC6E – SEPTEMBER 2012 – REVISED JUNE 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: DP83848-EP
Detailed Description
Copyright © 2012–2019, Texas Instruments Incorporated
5.5.1.1.2 Scrambler
The scrambler is required to control the radiated emissions at the media connector and on the twisted-pair
cable (for 100BASE-TX applications). By scrambling the data, the total energy launched onto the cable is
randomly distributed over a wide frequency range. Without the scrambler, energy levels at the PMD and
on the cable could peak beyond FCC limitations at frequencies related to repeating 5B sequences (that is,
continuous transmission of IDLEs).
The scrambler is configured as a closed loop linear feedback shift register (LFSR) with an 11-bit
polynomial. The output of the closed loop LFSR is X-ORd with the serial NRZ data from the code-group
encoder. The result is a scrambled data stream with sufficient randomization to decrease radiated
emissions at certain frequencies by as much as 20 dB. The DP83848-EP uses the PHY_ID (pins PHYAD
[4:1]) to set a unique seed value.
5.5.1.1.3 NRZ to NRZI Encoder
After the transmit data stream has been serialized and scrambled, the data must be NRZI encoded in
order to comply with the TP-PMD standard for 100BASE-TX transmission over Category-5 Unshielded
twisted-pair cable.
5.5.1.1.4 Binary to MLT-3 Convertor
The Binary to MLT-3 conversion is accomplished by converting the serial binary data stream output from
the NRZI encoder into two binary data streams with alternately phased logic one events. These two binary
streams are then fed to the twisted-pair output driver which converts the voltage to current and alternately
drives either side of the transmit transformer primary winding, resulting in a MLT-3 signal.
The 100BASE-TX MLT-3 signal sourced by the PMD Output Pair common driver is slew rate controlled.
This should be considered when selecting AC coupling magnetics to ensure TP-PMD Standard compliant
transition times (3 ns < Tr < 5 ns).
The 100BASE-TX transmit TP-PMD function within the DP83848-EP is capable of sourcing only MLT-3
encoded data. Binary output from the PMD Output Pair is not possible in 100 Mbps mode.
5.5.1.2
100BASE-TX Receiver
The 100BASE-TX receiver consists of several functional blocks which convert the scrambled MLT-3 125
Mbps serial data stream to synchronous 4-bit nibble data that is provided to the MII. Because the
100BASE-TX TP-PMD is integrated, the differential input pins, RD±, can be directly routed from the AC
coupling magnetics.
See Figure 5-6 for a block diagram of the 100BASE-TX receive function. This provides an overview of
each functional block within the 100BASE-TX receive section.
The Receive section consists of the following functional blocks:
Analog Front End
Digital Signal Processor
Signal Detect
MLT-3 to Binary Decoder
NRZI to NRZ Decoder
Serial to Parallel
Descrambler
Code Group Alignment
4B/5B Decoder
Link Integrity Monitor
Bad SSD Detection



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com