V62SLASH12615-01XE-R datasheet(8/97 Pages) TI1

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DP83848-EP

SLLSEC6E – SEPTEMBER 2012 – REVISED JUNE 2019

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Pin Configuration and Functions

Table 3-3. MAC Data Interface (continued)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

CRS/CRS_DV

S, O, PU

MII CARRIER SENSE: Asserted high to indicate the receive medium is non-idle.

RMII CARRIER SENSE/RECEIVE DATA VALID: This signal combines the RMII Carrier and Receive Data

Valid indications. For a detailed description of this signal, see the RMII Specification.

SNI CARRIER SENSE: Asserted high to indicate the receive medium is non-idle. It is used to frame valid

receive data on the RXD_0 signal.

COL

S, O, PU

MII COLLISION DETECT: Asserted high to indicate detection of a collision condition (simultaneous transmit

and receive activity) in 10-Mbps and 100-Mbps Half Duplex Modes.

While in 10BASE-T Half Duplex mode with heartbeat enabled this pin is also asserted for a duration of

approximately 1 µs at the end of transmission to indicate heartbeat (SQE test).

In Full Duplex Mode, for 10-Mbps or 100-Mbps operation, this signal is always logic 0. There is no heartbeat

function during 10-Mbps full duplex operation.

RMII COLLISION DETECT: Per the RMII Specification, no COL signal is required. The MAC will recover CRS

from the CRS_DV signal and use that along with its TX_EN signal to determine collision.

SNI COLLISION DETECT: Asserted high to indicate detection of a collision condition (simultaneous transmit

and receive activity) in 10-Mbps SNI mode.

Table 3-4. Clock Interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

CRYSTAL/OSCILLATOR INPUT: This pin is the primary clock reference input for the DP83848-EP and must be

connected to a 25-MHz 0.005% (±50 ppm) clock source. The DP83848-EP supports either an external crystal

resonator connected across pins X1 and X2, or an external CMOS-level oscillator source connected to pin X1

only.

RMII REFERENCE CLOCK: This pin is the primary clock reference input for the RMII mode and must be

connected to a 50-MHz 0.005% (±50 ppm) CMOS-level oscillator source.

CRYSTAL OUTPUT: This pin is the primary clock reference output to connect to an external 25-MHz crystal

resonator device. This pin must be left unconnected if an external CMOS oscillator clock source is used.

25MHz_OUT

25-MHz CLOCK OUTPUT:

In MII mode, this pin provides a 25-MHz clock output to the system.

In RMII mode, this pin provides a 50-MHz clock output to the system.

This allows other devices to use the reference clock from the DP83848-EP without requiring additional clock

sources.

V62/12615-01XE-R Datasheet(PDF) 8 Page - Texas Instruments

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