MCP660 datasheet(25/68 Pages) MICROCHIP

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DS20002194E-page 25

MCP660/1/2/3/4/5/9

4.5

MCP663 and MCP665 Chip Select

The MCP663 is a single amplifier with Chip Select

(CS). When CS is pulled high, the supply current drops

to 1 µA (typical) and flows through the CS pin to VSS.

When this happens, the amplifier output is put into a

high-impedance state. By pulling CS low, the amplifier

is enabled. The CS pin has an internal 5 M

 (typical)

pulldown resistor connected to VSS, so it will go low if

the CS pin is left floating. Figures 1-1, 2-43 and 2-44

show the output voltage and supply current response to

a CS pulse.

The MCP665 is a dual amplifier with two CS pins; CSA

controls op amp A and CSB controls op amp B. These

op amps are controlled independently, with an enabled

quiescent current (IQ) of 6 mA/amplifier (typical) and a

disabled IQ of 1 µA/amplifier (typical). The IQ seen at

the supply pins is the sum of the two op amps’ IQ; the

typical value for the IQ of the MCP665 will be 2 µA,

6 mA or 12 mA when there are 0, 1 or 2 amplifiers

enabled, respectively.

4.6

Power Supply

With this family of operational amplifiers, the power

supply pin (VDD for single supply) should have a local

bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm

for good high-frequency performance. Surface mount,

multilayer ceramic capacitors, or their equivalent,

should be used.

These op amps require a bulk capacitor (i.e., 2.2 µF or

larger) within 50 mm to provide large, slow currents.

Tantalum capacitors, or their equivalent, may be a good

choice. This bulk capacitor can be shared with other

nearby analog parts as long as crosstalk through the

power supplies does not prove to be a problem.

4.7

High Speed PCB Layout

These op amps are fast enough that a little extra care

in the printed circuit board (PCB) layout can make a

significant difference in performance. Good PC board

layout

techniques

will

help

you

achieve

the

performance shown in the specifications and typical

performance curves; it will also help minimize

electromagnetic compatibility (EMC) issues.

Use a solid ground plane. Connect the bypass local

capacitor(s) to this plane with minimal length traces.

This cuts down inductive and capacitive crosstalk.

Separate digital from analog, low-speed from

high-speed and low-power from high-power. This will

reduce interference.

Keep sensitive traces short and straight. Separate

them from interfering components and traces. This is

especially important for high-frequency (low rise time)

signals.

Sometimes, it helps to place guard traces next to victim

traces. They should be on both sides of the victim trace

and as close as possible. Connect guard traces to

ground plane at both ends and in the middle for long

traces.

Use coax cables, or low inductance wiring, to route

signal and power to and from the PCB. Mutual and self

inductance of power wires is often a cause of crosstalk

and unusual behavior.

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