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ST7LUS5 Datasheet(PDF) 80 Page - STMicroelectronics |
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ST7LUS5 Datasheet(HTML) 80 Page - STMicroelectronics |
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80 / 124 page ![]() On-chip peripherals ST7LUS5, ST7LU05, ST7LU09 80/124 Table 51. ADC clock speed configuration fADC ADCDRL SLOW bit ADCCSR SPEED bit fCPU/2 0 0 fCPU 01 fCPU/4 1 x Table 52. ADC register map and reset values Address (Hex.) Register label 76 54 32 10 0034h ADCCSR Reset value EOC 0 SPEED 0 ADON 0 0 0 0 0 CH2 0 CH1 0 CH0 0 0035h ADCDRH Reset value D9 0 D8 0 D7 0 D6 0 D5 0 D4 0 D3 0 D2 0 0036h ADCDRL Reset value 0 0 0 0 0 0 0 0 SLOW 0 0 0 D1 0 D0 0 |
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