ST7LUS5 datasheet(40/124 Pages) STMICROELECTRONICS

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Interrupts

ST7LUS5, ST7LU05, ST7LU09

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Note:

These 8 bits can be written only when the I bit in the CC register is set.

Changing the sensitivity of a particular external interrupt clears this pending interrupt. This

can be used to clear unwanted pending interrupts. Refer to section External interrupt

function on page 56.

7.3.2

External interrupt control register 2 (EICR2)

Note:

These 8 bits can be written only when the I bit in the CC register is set.

Changing the sensitivity of a particular external interrupt clears this pending interrupt. This

can be used to clear unwanted pending interrupts. Refer to section External interrupt

function on page 56.

IS4[1:0] = 01 is the only safe configuration to avoid a spurious interrupt in Halt and AWUFH

modes.

3:2

IS1[1:0]

ei1 sensitivity

These bits define the interrupt sensitivity for ei1 according to Table 18.

1:0

IS0[1:0]

ei0 sensitivity

These bits define the interrupt sensitivity for ei0 according to Table 18.

Table 16.

EICR1 register description (continued)

Bit

Name

Function

EICR2

Reset value: 0000 0000 (00h)

654

Reserved

IS4[1:0]

IS3[1:0]

-R/W

R/W

Table 17.

EICR2 register description

Bit

Name

Function

7:4

Reserved

3:2

IS4[1:0]

ei4 sensitivity

These bits define the interrupt sensitivity for ei1 according to Table 18.

1:0

IS3[1:0]

ei3 sensitivity

These bits define the interrupt sensitivity for ei0 according to Table 18.

Table 18.

Interrupt sensitivity bits

ISx1

ISx0

External interrupt sensitivity

Falling edge and low level

Rising edge only

Falling edge only

Rising and falling edge

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