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ST7LUS5 Datasheet(PDF) 32 Page - STMicroelectronics |
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ST7LUS5 Datasheet(HTML) 32 Page - STMicroelectronics |
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32 / 124 page ![]() Supply, reset and clock management ST7LUS5, ST7LU05, ST7LU09 32/124 Figure 9. Clock management block diagram MCCSR SMS PERIPHERALS (1ms timebase @ 8 MHz fOSC) fOSC/32 fOSC fOSC fLTIMER LITE TIMER COUNTER 13-BIT fCPU TO CPU AND 0 1 CR6 CR9 CR2 CR3 CR4 CR5 CR8 CR7 RCCR fOSC CLKIN Tunable internal RC oscillator Option bits CKSEL[1:0] /2 DIVIDER AWU 8MHz 2MHz 1MHz 4MHz Prescaler RC 8MHz (fRC) 33 kHz Clock Controller External Clock AWU CK RC OSC CR1 CR0 SICSR /32 DIVIDER fCLKIN CKCNTCSR RC/AWU |
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