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HC705RC16GRS/D Datasheet(PDF) 74 Page - NXP Semiconductors |
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HC705RC16GRS/D Datasheet(HTML) 74 Page - NXP Semiconductors |
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74 / 120 page  Carrier Modulator Transmitter (CMT) General Release Specification MC68HC705RC16 — Rev. 3.0 Carrier Modulator Transmitter (CMT) 9.5.1 Time Mode When the modulator operates in time mode, the modulation mark and space periods consist of zero or an integer number of fosc ÷ 8 clocks (= 250 kHz @ 2 MHz osc). This provides a modulator resolution of 4 µs and a maximum mark and space periods of about 16 ms (each). However, to prevent carrier glitches which could affect carrier spectral purity, the modulator control gate and carrier clock are synchronized. The carrier signal is activated when the modulator gate opens. The modulator gate can only close when the carrier signal is low (the output logic level during space periods is low). If the carrier generator is in baseband mode (BASE bit in MCSR is high), the modulator output will be at a logic 1 for the duration of the mark period and at a logic 0 for the duration of a space period. See Figure 9-8. The mark and space time equations are: Setting the DIV2 bit in the MCSR will double mark and space times. tmark MBUFF 1 + () 8 × fosc ----------------------------------------------s sec = tspace SBUFF 8 × fosc ------------------------------ s sec = Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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