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56F8167 Datasheet(PDF) 34 Page - Freescale Semiconductor, Inc |
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56F8167 Datasheet(HTML) 34 Page - Freescale Semiconductor, Inc |
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34 / 184 page  56F8367 Technical Data, Rev. 8 34 Freescale Semiconductor Preliminary PWMA0 73 M11 Output In reset, output is disabled, pull-up is enabled PWMA0 - 5 — These are six PWMA outputs. PWMA1 75 P12 PWMA2 76 N11 PWMA3 78 M12 PWMA4 79 P13 PWMA5 81 N12 ISA0 (GPIOC8) 126 A11 Schmitt Input Schmitt Input/ Output Input, pull-up enabled ISA0 - 2 — These three input current status pins are used for top/bottom pulse width correction in complementary channel operation for PWMA. Port C GPIO — These GPIO pins can be individually programmed as input or output pins. In the 56F8367, these pins default to ISA functionality after reset. In the 56F8167, the default state is not one of the functions offered and must be reconfigured. To deactivate the internal pull-up resistor, clear the appropriate bit of the GPIOC_PUR register. For details, see Part 6.5.8. ISA1 (GPIOC9) 127 C11 ISA2 (GPIOC10) 128 D11 FAULTA0 82 N13 Schmitt Input Input, pull-up enabled FAULTA0 - 2 — These three fault input pins are used for disabling selected PWMA outputs in cases where fault conditions originate off-chip. To deactivate the internal pull-up resistor, set the PWMA0 bit in the SIM_PUDR register. For details, see Part 6.5.8. FAULTA1 84 N14 FAULTA2 85 M13 FAULTA3 87 M14 Schmitt Input Input, pull-up enabled FAULTA3 — This fault input pin is used for disabling selected PWMA outputs in cases where fault conditions originate off-chip. To deactivate the internal pull-up resistor, set the PWMA1 bit in the SIM_PUDR register. See Part 6.5.6 for details. PWMB0 38 N1 Output In reset, output is disabled, pull-up is enabled PWMB0 - 5 — Six PWMB output pins. PWMB1 39 P1 PWMB2 40 N2 PWMB3 43 N3 PWMB4 44 P2 PWMB5 45 M3 Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued) Signal Name Pin No. Ball No. Type State During Reset Signal Description |
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