56F8167 datasheet(57/184 Pages) FREESCALE

57 / 184 page

Peripheral Memory Mapped Registers

56F8367 Technical Data, Rev. 8

Freescale Semiconductor

Preliminary

TMRD0_LOAD

Load Register

TMRD0_HOLD

Hold Register

TMRD0_CNTR

Counter Register

TMRD0_CTRL

Control Register

TMRD0_SCR

Status and Control Register

TMRD0_CMPLD1

Comparator Load Register 1

TMRD0_CMPLD2

Comparator Load Register 2

TMRD0_COMSCR

Comparator Status and Control Register

Reserved

TMRD1_CMP1

$10

Compare Register 1

TMRD1_CMP2

$11

Compare Register 2

TMRD1_CAP

$12

Capture Register

TMRD1_LOAD

$13

Load Register

TMRD1_HOLD

$14

Hold Register

TMRD1_CNTR

$15

Counter Register

TMRD1_CTRL

$16

Control Register

TMRD1_SCR

$17

Status and Control Register

TMRD1_CMPLD1

$18

Comparator Load Register 1

TMRD1_CMPLD2

$19

Comparator Load Register 2

TMRD1_COMSCR

$1A

Comparator Status and Control Register

Reserved

TMRD2_CMP1

$20

Compare Register 1

TMRD2_CMP2

$21

Compare Register 2

TMRD2_CAP

$22

Capture Register

TMRD2_LOAD

$23

Load Register

TMRD2_HOLD

$24

Hold Register

TMRD2_CNTR

$25

Counter Register

TMRD2_CTRL

$26

Control Register

TMRD2_SCR

$27

Status and Control Register

TMRD2_CMPLD1

$28

Comparator Load Register 1

TMRD2_CMPLD2

$29

Comparator Load Register 2

TMRD2_COMSCR

$2A

Comparator Status and Control Register

Reserved

Table 4-14 Quad Timer D Registers Address Map (Continued)

(TMRD_BASE = $00 F100)

Quad Timer D is NOT available in the 56F8167 device

Address Offset

56F8167 Datasheet(PDF) 57 Page - Freescale Semiconductor, Inc

56F8167 Datasheet(HTML) 57 Page - Freescale Semiconductor, Inc

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