UMA1019AM datasheet(10/16 Pages) PHILIPS

10 / 16 page

1995 Jul 07

Philips Semiconductors

Product speciﬁcation

Low-voltage frequency synthesizer

for radio telephones

UMA1019AM

SERIAL BUS TIMING CHARACTERISTICS

VDD =VCC =3V; Tamb =25 °C; unless otherwise speciﬁed.

Note

1. The minimum pulse width (tW) can be smaller than 4 µs provided all the following conditions are satisfied:

a) Main divider input frequency

b) Reference divider input frequency

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

Serial programming clock; CLK

input rise time

−

input fall time

−

Tcy

clock period

100

−−

Enable programming; E

tSTART

delay to rising clock edge

−−

tEND

delay from last falling clock edge

−20

−−

minimum inactive pulse width

4000(1)

−−

tSU;E

enable set-up time to next clock edge

−−

tSU;DAT

input data to clock set-up time

−−

tHD;DAT

input data to clock hold time

−−

VCO

512

----------

XTAL

------

Fig.3 Serial bus timing diagram.

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