STAC9766 datasheet(23/97 Pages) IDT

23 / 97 page

STAC9766/9767

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING

PC AUDIO

IDT™

STAC9766/9767

V 7.4 12/06

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING

CODECs configured as Secondary must power up with the BIT_CLK pin configured as an input.

Using the provided BIT_CLK signal is necessary to ensure that everything on the AC-link is synchro-

nous. BIT_CLK is the clock source (multiplied by 2 so that the internal rate is 24.576 MHz).

4.3.3.

CODEC ID Strapping

Audio CODECs in the 48-pin package use pins 45 and 46 (defined as ID0# and ID1#) as strapping

(i.e. configuration) pins to configure the CODEC ID. The ID0# and ID1# strapping bits adopt inverted

polarity and default to 00 = Primary (via a weak internal pullup) when left floating. This eliminates the

need for external resistors for CODECs configured as Primary, and maintains backward compatibil-

ity with existing layouts that treat pins 45 and 46 as “no connect” or cap to ground. Pulldowns are

typically 1 K

Ω - 10 KΩ and connected to Digital (not Analog) Ground.

4.4.

Clocking for Multiple CODEC Implementations

To keep the system synchronous, all Primary and Secondary CODEC clocking must be derived from

the same clock source, so they are operating on the same time base. In addition, all AC-link protocol

timing must be based on the BIT_CLK signal, to ensure that everything on the AC-link will be syn-

chronous.

The following are potential 24.576 MHz clock options available to a Secondary CODEC:

•

Using an external 24.576 MHz signal source (external oscillator or AC‘97 Digital Controller)

•

Using the Primary’s XTAL_OUT

•

Using the Primary’s BIT_CLK output to derive 24.576 MHz

See section 2.2.3: page14 for clock frequencies supported and configurations.

4.4.1.

STAC9766/9767 as a Primary CODEC

Primary devices are required to support correctly either of the following clocking options:

•

24.576 MHz crystal attached to XTAL_IN and XTAL_OUT

•

24.576 MHz external oscillator provided to XTAL_IN

•

12.288 MHz oscillator provided to the BIT_CLK input

The Primary device may also optionally support the following clocking option:

•

14.318 MHz external oscillator provided to XTAL_IN

See section 2.2.3: page14 for clock frequencies supported and configurations.

Table 3. Recommended CODEC ID Strapping

CID1 (pin 46)

CID0 (pin 45)

Configuration

NC (weak internal pullup)

Primary ID 00

NC (weak internal pullup)

pulldown

Secondary ID 01

pulldown

NC (weak internal pullup)

Secondary ID 10

pulldown

Secondary ID 11

STAC9766 Datasheet(PDF) 23 Page - Integrated Device Technology

STAC9766 Datasheet(HTML) 23 Page - Integrated Device Technology

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