STAC9766 datasheet(35/97 Pages) IDT

35 / 97 page

STAC9766/9767

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING

PC AUDIO

IDT™

STAC9766/9767

V 7.4 12/06

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING

Figure 18. Start of an Audio Input Frame

SDATA_IN’s composite stream is MSB justified (MSB first) with all non-valid bit positions (for

assigned and/or unassigned time slots) stuffed with 0 by the AC‘97 CODEC. SDATA_IN data is

sampled on the falling edges of BIT_CLK.

5.4.1.

Slot 0: TAG

Within slot 0 the first bit is a global bit (SDATA_IN slot 0, bit 15), which flags whether the AC‘97

CODEC is in the “CODEC Ready” state or not. If the “CODEC Ready” bit is a 0, this indicates that

the AC‘97 CODEC is not ready for normal operation. This condition is normal following the deasser-

tion of power on reset for example, while the AC‘97 CODEC’s voltage references settle. When the

AC-link “CODEC Ready” indicator bit is a 1 it indicates that the AC-link and AC‘97 CODEC control

and status registers are in a fully operational state. CODEC must assert “CODEC Ready” within

400

µs after it starts receiving valid SYNC pulses from the controller, to provide indication of connec-

tion to the link and Control/Status registers are available for access. The AC`97 Controller and

related software must wait until all of the lower four bits of the Control/Status Register, 26h, are set

before attempting any register writes, or attempting to enable any audio stream, to avoid undesirable

audio artifacts.

Prior to any attempts at putting an AC‘97 CODEC into operation, the AC‘97 Controller should poll the

first bit in the AC-link input frame (SDATA_IN slot 0, bit 15) for an indication that CODEC has gone

“CODEC Ready”. Once an AC‘97 CODEC is sampled “CODEC Ready”1, then the next 12 bit posi-

tions sampled by the AC‘97 Controller indicate which of the corresponding 12 time slots are

assigned to input data streams and contain valid data.

5.4.2.

Slot 1: Status Address Port / SLOTREQ signaling bits

5.4.2.1.

Status Address Port

The status port is used to monitor status for the STAC9766/9767 functions including, but not limited

to, mixer settings and power management. AC-link input frame slot 1’s stream echoes the control

1. There are several subsections within an AC‘97 CODEC that can independently go busy/ready. It is the responsibility of the AC’97

controller to probe more deeply into the AC‘97 CODEC’s register file to determine which subsections are actually ready (refer to

section 6.3 for more information).

SYNC

BIT_CLK

SDATA_IN

slot1

slot2

End of previous audio frame

Codec

Ready

SYNC

detected

first

SDATA_OUT

bit of frame

STAC9766 Datasheet(PDF) 35 Page - Integrated Device Technology

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