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SMC032AF Datasheet(PDF) 18 Page - Numonyx B.V |
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SMC032AF Datasheet(HTML) 18 Page - Numonyx B.V |
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18 / 82 page  Electrical interface SMCxxxAF 18/82 READY (PC card memory mode) O37 Indicates whether the card is busy (Low), or ready to accept a new data transfer operation (High). The Host socket must provide a pull-up resistor. At power-up and reset, the READY signal is held Low until the commands are completed. No access should be made during this time. The READY signal is held High whenever the card has been powered up with RESET continuously disconnected or asserted. –IREQ (PC card I/O mode) Interrupt request. It is strobed Low to generate a pulse mode interrupt or held Low for a level mode interrupt. INTRQ (True IDE mode) Active High Interrupt request to the host. –REG (PC card memory mode) I44 Used to distinguish between common memory and register (attribute) memory accesses. High for common memory, Low for attribute memory. –REG (PC card I/O mode) Must be Low during I/O cycles when the I/O address is on the bus. Reserved (True IDE mode) Not used, should be connected to VCC by the host. RESET (PC card memory mode) I41 Resets the card (active High). The card is reset at power- up only if this pin is left High or unconnected. RESET (PC card I/O mode) Same as PC card memory mode. –RESET (True IDE mode) Hardware Reset from the host (active Low). VCC (PC card memory mode) 13,38 +5 V, +3.3 V power. VCC (PC card I/O mode) Same for all modes. VCC (True IDE mode) Same for all modes. –VS1, –VS2 (PC card memory mode) O33,40 Voltage sense signals.–VS1 is grounded so that the CIS can be read at 3.3 volts and –VS2 is reserved by PCMCIA for a secondary voltage. –VS1, –VS2 (PC card I/O mode) Same for all modes. –VS1, –VS2 (True IDE mode) Same for all modes. –WAIT (PC card memory mode) O 42 ST CF does not assert the WAIT (IORDY) signal. –WAIT (PC card I/O mode) IORDY (True IDE mode) Table 9. Signal description (continued) Signal name Direction Pin Description |
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