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CSG14K_CSG8K Datasheet(PDF) 88 Page - ams-OSRAM AG |
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CSG14K_CSG8K Datasheet(HTML) 88 Page - ams-OSRAM AG |
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88 / 114 page  Document Feedback CSG14K_CSG8K Functional Description Datasheet • PUBLIC DS000571 • v2-01 • 2023-Feb-10 113 │ 87 Attention The equations introduced in 7.5.4 must be respected. The figure below shows an example for an ROI of 2000 columns, starting at column 760, read out over 4 outputs per side (XSTART=760, KSIZE=500, NR_OUTP=4). Figure 108: Readout of a Horizontal ROI Over 4 Outputs Per Side Pixel Order The selected ROI (or full image width) is divided over 1 or more output channels. On each output, pixels are presented in-order. The figure below shows the timing of the readout the scenario of Figure 108 (each box represents the physical column address of the pixel). Figure 109: Multiplexed Sub-LVDS Timing Example 3870 (total image array width) 760 500 DVAL DATA0_OUT TP 760 TP TP TP 1260 TP TP TP 1760 TP TP TP 2260 TP TP DATA1_OUT DATA2_OUT DATA3_OUT 1259 1759 2259 2759 761 1261 1761 2261 762 1262 1762 2262 ... ... ... ... TP TP TP TP TP TP TP TP #1 #2 #3 #500 |
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