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RZ/N2L Datasheet(PDF) 29 Page - Renesas Technology Corp |
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RZ/N2L Datasheet(HTML) 29 Page - Renesas Technology Corp |
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29 / 128 page  1.7 FBGA 121 Pin Assignments 1 2 3 4 5 6 7 8 9 10 11 VSS P01_2 P00_5 P00_4 P24_2 P24_1 P24_0 P21_1 P20_4 VSS P01_5 P01_4 P00_6 P00_2 P00_0 P23_7 P21_3 P20_2 P18_6 P18_4 P02_5 P01_3 TRST# VCC 1833_2 P00_1 VCC33 P21_4 P20_3 P18_3 P17_5 P02_7 P02_4 P02_6 VDD VSS VDD VDD AVCC18 _TSU P17_0 P16_5 P04_6 P04_5 BSCANP VCC33 VSS VSS VSS VSS P16_3 P16_2 VSS P04_7 P05_5 VDD VDD VSS VSS VDD P06_1 P06_0 P06_6 P06_3 VSS VDD VCC33 VCC33 P15_0 P14_7 P15_1 P06_4 P06_2 P07_1 VCC33 RES# VSS VCC18_ PLL0 VSS P14_2 P14_3 P14_6 P06_5 P06_7 P07_3 P08_7 MDX VCC 1833_0 EXT CLKIN VCC18 _PLL1 P13_3 P13_5 P14_1 VSS P07_0 P07_2 P09_0 VSS EXTAL XTAL VSS P13_2 P13_4 VSS A B C D E F H J K L P05_6 P05_7 VCC 1833_1 VSS VDD VDD VDD VSS P16_0 VSS G VCC 1833_3 P15_2 P15_7 P16_6 VCC 1833_4 P18_2 P18_5 P20_1 P21_2 A B C D E F H J K L G 1 2 3 4 5 6 7 8 9 10 11 Figure 1.3 Pin arrangement (121-pin FBGA) (top view) Table 1.20 List of pins and pin functions (121-pin FBGA) (1 of 4) Pin number I/O power domain Power supply clock system control I/O port DMAC Timer (MTU3, POEG, GPT / POE3, CMTW, RTC) Communication (xSPI, GMAC, ETHSW, ESC, SCI, SPI, IIC, CANFD) Others (DSMIF, Mailbox) Interrupt Host interface (SHOSTI F) A1 — VSS — — — — — — — A2 VCC1833_2 — P01_2 — MTIOC4B / GTIOC2B ETH2_TXD3 — IRQ2 — A3 VCC1833_2 — P00_5 — MTIOC3C / GTIOC0B ETHSW_PHYLINK2 / ETHSW_PHYLINK0 / ESC_PHYLINK0 MDAT0 — — A4 VCC1833_2 — P00_4 — MTIOC3A / GTIOC0A ETH2_RXER MCLK0 IRQ13 — A5 VCC1833_2 — P24_2 — MTIOC0D / GTETRGD ETH2_RXD2 / TXD1 / SDA1 / MOSI1 MDAT5 — — A6 VCC1833_2 — P24_1 — MTIOC0C / GTETRGC / POE8# ETH2_RXCLK MCLK5 — — A7 VCC1833_2 — P24_0 DREQ MTIOC0B / GTETRGB ETH2_RXD1 / RXD1 / SCL1 / MISO1 MDAT4 — — A8 — TRACEDATA0 P21_1 — MTIOC6A / GTIOC14A / CMTW0_TIC0 ESC_SYNC0 / ESC_SYNC1 / SCK5 / SPI_SSL20 / IIC_SCL1 MCLK0 — HSPI_INT # A9 — TRACEDATA1 P21_2 — MTIOC6B / GTIOC14B / CMTW0_TIC1 ESC_SYNC0 / ESC_SYNC1 / RXD5 / SCL5 / MISO5 / SPI_MISO2 / IIC_SDA1 MDAT0 — — A10 — MDV3 P20_4 — — ETHSW_TDMAOUT3 / ETHSW_PTPOUT0 / ESC_LINKACT1 — — — A11 — VSS — — — — — — — B1 VCC1833_2 — P01_5 — — ETH2_TXD0 — — — B2 VCC1833_2 — P01_4 — POE0# ETH2_TXD1 — IRQ3 — B3 VCC1833_2 — P00_6 — MTIOC3B / GTIOC1A ETH2_TXCLK — — — B4 VCC1833_2 — P00_2 — MTIC5V ETH2_TXEN / TXD2 / SDA2 / MOSI2 — — — B5 VCC1833_2 — P00_0 — — ETH2_RXD3 / SCK2 / DE2 — — — B6 VCC1833_2 — P23_7 — MTIOC0A / GTETRGA ETH2_RXD0 / SCK1 MCLK4 — — B7 — TRACEDATA2 P21_3 — MTIOC6C / GTIOC15A TXD5 / SDA5 / MOSI5 MCLK1 — — RZ/N2L Datasheet 1. Overview R01DS0397EJ0140 Rev.1.40 Mar 31, 2026 Page 29 of 128 |
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