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RZ/N2L Datasheet(PDF) 71 Page - Renesas Technology Corp

Part # RZ/N2L
Description  RZ Arm-based High-end 32 & 64-bit MPUs
PDF  128 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

RZ/N2L Datasheet(HTML) 71 Page - Renesas Technology Corp

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 71 / 128 page
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CKIO
Tp
Trr
A25 to A0
tAD1
tCSD1
tRWD1
A12/A11*1
RD/WR#
tCSD1
DACK*2
Tpw
Trr
tRWD1
D15 to D0
BS#
tAD1
CS3#, CS2#
RAS#
tRASD1
tRASD1
tCASD1
CAS#
tCASD1
DQMLU, DQMLL
CKE
Trc
Trc
tRWD1
tCSD1
tCSD1
tRASD1
tRASD1
(Hi-Z)
Trc
Tmw
Trc
Tde
PALL
REF
REF
MRS
tAD1
tAD1
tAD1
tCSD1
tCSD1
tCSD1
tCSD1
tRWD1
tRWD1
tRASD1
tRASD1
tRASD1
tRASD1
tCASD1
tCASD1
tCASD1
tCASD1
Note 1. Address pin to be connected to A10 of SDRAM.
Note 2. DACK is waveform when active-low is specified.
Figure 2.35
Synchronous DRAM mode register set timing (WTRP = 1 cycle)
2.5.4
DMAC Timing
Table 2.23
DMAC timing
Conditions: VOH = VCC33 × 0.5, VOL = VCC33 × 0.5, C = 15 pF (CKIO), 30 pF (others), Tjmin = −40°C
Parameter
Symbol
Min.*1
Max.
Unit
Reference figure
DMAC
DREQ pulse width
tDRQW
tIcyc × 2
—
ns
Figure 2.36
DACK and TEND delay time
tDACD
0
10
ns
Figure 2.37
Note 1. tIcyc: ICLK cycle
RZ/N2L Datasheet
2. Electrical Characteristics
R01DS0397EJ0140 Rev.1.40
Mar 31, 2026
Page 71 of 128



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