H8SXSLASH1663R datasheet(1112/1504 Pages) RENESAS

1112 / 1504 page

Section 22 A/D Converter

Rev. 2.00 Sep. 24, 2008 Page 1080 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

Value

R/W

Description

CKS1

CKS0

R/W

Clock Select 1 and 0

These bits set the A/D conversion time in combination

with the EXCKS bit. First select the A/D conversion time

by setting bits CKS1 and CKS0 while ADST = 0 and then

set the mode of A/D conversion.

EXCKS, CKS1, and CKS0

000: A/D conversion time = 528 states*

2 (max.)

001: A/D conversion time = 268 states*

2 (max.)

010: A/D conversion time = 138 states*

2 (max.)

011: A/D conversion time = 73 states*

2 (max.)

100: A/D conversion time = 336 states*

2 (max.)

101: A/D conversion time = 172 states*

2 (max.)

110: A/D conversion time = 90 states*

2 (max.)

111: A/D conversion time = 49 states*

2 (max.)

ADSTCLR 0

R/W

A/D Start Clear

This bit enables or disables automatic clearing of the

ADST bit in scan mode.

0: The ADST bit is not automatically cleared to 0 in scan

mode.

1: Clears the ADST bit to 0 upon completion of the A/D

conversion for all of the selected channels in scan

mode.

[Legend]

Don't care

Notes: 1. To set A/D conversion to start by the

ADTRG0 pin, the DDR bit and ICR bit for the

corresponding pin should be set to 0 and 1, respectively. For details, see section 13, I/O

Ports.

2. P

φ criterion

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