H8SXSLASH1663R datasheet(1288/1504 Pages) RENESAS

1288 / 1504 page

Section 28 Power-Down Modes

Rev. 2.00 Sep. 24, 2008 Page 1256 of 1468

REJ09B0412-0200

Bit

Bit Name

Initial

Value

R/W

Module

DIRQ0EG

R/W

IRQ0 Interrupt Edge Select

Selects the active edge for IRQ0-A pin input.

0: The interrupt request is generated by a falling edge.

1: The interrupt request is generated by a rising edge.

28.2.9

Reset Status Register (RSTSR)

The DPSRSTF bit in RSTSR indicates that deep software standby mode has been canceled by an

interrupt.

RSTSR is not initialized by the internal reset signal upon exit from deep software standby mode.

Bit

Bit name

Initial value:

R/W:

DPSRSTF

R/(W)*1



R/W



R/W



R/W



R/W

LVDF*2

0*3

R/(W)*4



0*3

R/W

PORF*2

0*3

R/W*5

Notes: 1.

Only 0 can be written to clear the flag.

Supported only by the H8SX/1668M Group.

Initial value is undefined in the H8SX/1668M Group.

Only 0 can be written to clear the flag in the H8SX/1668M Group.

Readable only in the H8SX/1668M Group.

Bit

Bit Name

Initial

Value

R/W

Module

DPSRSTF 0

R/(W)* Deep Software Standby Reset Flag

Indicates that deep software standby mode has been

canceled by an interrupt source specified in DPSIER or

DPSIEGR and an internal reset is generated.

[Setting condition]

Deep software standby mode is canceled by an interrupt

source.

[Clearing condition]

Writing a 0 to this bit after reading it as 1.

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