56F8167 datasheet(53/182 Pages) FREESCALE

53 / 182 page

Peripheral Memory Mapped Registers

56F8367 Technical Data, Rev. 9

Freescale Semiconductor

Preliminary

Reserved

TMRA2_CMP1

$20

Compare Register 1

TMRA2_CMP2

$21

Compare Register 2

TMRA2_CAP

$22

Capture Register

TMRA2_LOAD

$23

Load Register

TMRA2_HOLD

$24

Hold Register

TMRA2_CNTR

$25

Counter Register

TMRA2_CTRL

$26

Control Register

TMRA2_SCR

$27

Status and Control Register

TMRA2_CMPLD1

$28

Comparator Load Register 1

TMRA2_CMPLD2

$29

Comparator Load Register 2

TMRA2_COMSCR

$2A

Comparator Status and Control Register

Reserved

TMRA3_CMP1

$30

Compare Register 1

TMRA3_CMP2

$31

Compare Register 2

TMRA3_CAP

$32

Capture Register

TMRA3_LOAD

$33

Load Register

TMRA3_HOLD

$34

Hold Register

TMRA3_CNTR

$35

Counter Register

TMRA3_CTRL

$36

Control Register

TMRA3_SCR

$37

Status and Control Register

TMRA3_CMPLD1

$38

Comparator Load Register 1

TMRA3_CMPLD2

$39

Comparator Load Register 2

TMRA3_COMSCR

$3A

Comparator Status and Control Register

Table 4-12 Quad Timer B Registers Address Map

(TMRB_BASE = $00 F080)

Quad Timer B is NOT available in the 56F8167 device

Address Offset

TMRB0_CMP1

Compare Register 1

TMRB0_CMP2

Compare Register 2

TMRB0_CAP

Capture Register

TMRB0_LOAD

Load Register

TMRB0_HOLD

Hold Register

Table 4-11 Quad Timer A Registers Address Map (Continued)

(TMRA_BASE = $00 F040)

Address Offset

56F8167 Datasheet(PDF) 53 Page - Freescale Semiconductor, Inc

56F8167 Datasheet(HTML) 53 Page - Freescale Semiconductor, Inc

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