56F8167 datasheet(55/182 Pages) FREESCALE

55 / 182 page

Peripheral Memory Mapped Registers

56F8367 Technical Data, Rev. 9

Freescale Semiconductor

Preliminary

TMRB3_LOAD

$33

Load Register

TMRB3_HOLD

$34

Hold Register

TMRB3_CNTR

$35

Counter Register

TMRB3_CTRL

$36

Control Register

TMRB3_SCR

$37

Status and Control Register

TMRB3_CMPLD1

$38

Comparator Load Register 1

TMRB3_CMPLD2

$39

Comparator Load Register 2

TMRB3_COMSCR

$3A

Comparator Status and Control Register

Table 4-13 Quad Timer C Registers Address Map

(TMRC_BASE = $00 F0C0)

Address Offset

TMRC0_CMP1

Compare Register 1

TMRC0_CMP2

Compare Register 2

TMRC0_CAP

Capture Register

TMRC0_LOAD

Load Register

TMRC0_HOLD

Hold Register

TMRC0_CNTR

Counter Register

TMRC0_CTRL

Control Register

TMRC0_SCR

Status and Control Register

TMRC0_CMPLD1

Comparator Load Register 1

TMRC0_CMPLD2

Comparator Load Register 2

TMRC0_COMSCR

Comparator Status and Control Register

Reserved

TMRC1_CMP1

$10

Compare Register 1

TMRC1_CMP2

$11

Compare Register 2

TMRC1_CAP

$12

Capture Register

TMRC1_LOAD

$13

Load Register

TMRC1_HOLD

$14

Hold Register

TMRC1_CNTR

$15

Counter Register

TMRC1_CTRL

$16

Control Register

TMRC1_SCR

$17

Status and Control Register

TMRC1_CMPLD1

$18

Comparator Load Register 1

Table 4-12 Quad Timer B Registers Address Map (Continued)

(TMRB_BASE = $00 F080)

Quad Timer B is NOT available in the 56F8167 device

Address Offset

56F8167 Datasheet(PDF) 55 Page - Freescale Semiconductor, Inc

56F8167 Datasheet(HTML) 55 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL