PCF2123TS datasheet(21/55 Pages) NXP

21 / 55 page

PCF2123_2

Product data sheet

Rev. 02 — 4 December 2009

21 of 55

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

The duration of both of these timers will be affected by the register Offset_register (see

Section 9.11). Only when the Offset_register has the value 00h the periods will be

consistent.

9.8.4 Countdown timer function

The 8-bit countdown timer at address 0Fh is controlled by the register Timer_clkout at

address 0Eh. The register Timer_clkout selects one of 4 source clock frequencies for the

timer (4.096 kHz, 64 Hz, 1 Hz, or 1

⁄

60 Hz) and enables or disables the timer.

[1]

When not in use, CTD must be set to 1

⁄

60 Hz for power saving.

[2]

Time periods can be affected by correction pulses.

Remark: Note that all timings which are generated from the 32.768 kHz oscillator are

based on the assumption that there is 0 ppm deviation. Deviation in oscillator frequency

will result in deviation in timings. This is not applicable to interface timing.

The timer counts down from a software-loaded 8-bit binary value, n. Loading the counter

with 0 stops the timer. Values from 1 to 255 are valid. When the counter reaches 1, the

countdown timer ﬂag (bit TF) will be set and the counter automatically re-loads and starts

the next timer period. Reading the timer will return the current value of the countdown

counter (see Figure 16).

Table 27.

Effect of MI and SI on MSF

Minute interrupt (bit MI)

Second interrupt (bit SI)

Result

MSF never set

MSF set when minutes counter

increments

MSF set when seconds counter

increments

MSF set when seconds counter

increments

Table 28.

Bits CTD0 and CTD1 for timer frequency selection and countdown timer

durations

CTD[1:0]

Timer source clock

frequency[1]

Delay

Minimum timer duration

n= 1

Maximum timer duration

n = 255

4.096 kHz

244

µs

62.256 ms

64 Hz

15.625 ms

3.984 s

1 Hz[2]

1 s

255 s

⁄60 Hz[2]

60 s

4 h 15 min

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