68HC05CL16 datasheet(91/145 Pages) MOTOROLA

91 / 145 page

June 11, 1997

GENERAL RELEASE SPECIFICATION

MC68HC05CL48

CALLER-ID

MOTOROLA

REV 2.0

11-7

CDIF, BIT5 (Carrier Detect Interrupt Flag)

Provided the carrier detect interrupt is enabled by setting the CDIE, this bit is

set when the carrier is detected. When this ﬂag is one an interrupt is generated.

This bit shares the interrupt vector address with Ring Detect interrupt. The

CDIF bit must be cleared by writing a zero.

RDIE, Bit6 (Ring Detect Interrupt Enable)

When set enables the ring detect interrupt to be generated when a ring is

detected or forced by writing to RDO.

RDIF, BIT7 (Ring Detect Interrupt Flag)

Provided the ring detect interrupt is enabled by setting the RDIE, this bit is set

when the ring is detected. When this ﬂag is one an interrupt is generated. This

bit shares the interrupt vector address with Carrier Detect interrupt. The RDIF

bit must be cleared by writing a zero.

11.7.2 Control/Status Register 2 (CLCSR2)

CD, Bit0 (Carrier Detect)

This read only bit returns the value of the Carrier Detect signal which goes low

when a valid carrier is detected and remains low while the carrier remains valid.

RD, Bit1 (Ring Detect)

This read only bit returns the value of the Ring Detect signal which goes low

when a valid ringing signal is detected and remains low as long as the ringing

signal remains valid.

CIDSD, Bit2 (Caller ID Serial Data)

This read only bit returns the value of the Caller ID Serial Data (output of the on

chip demodulator) whenever the CD is low. This data includes the alternate 0

and 1 pattern, 150 ms marking which precedes the data. At all other times the

demodulator output is high.

CDPW, Bit5 (Carrier Detect Power Up)

This bit when set is used to enable carrier detection. An interrupt will be

generated when a valid carrier is detected and if the CDIE bit in the CLCSR1

76543210

CLCSR2

$000B

READ

RDPW

CDPW

CIDSD

WRITE

RESET

U = UNAFFECTED

68HC05CL16 Datasheet(PDF) 91 Page - Motorola, Inc

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