AT90PWM2 datasheet(8/361 Pages) ATMEL

8 / 361 page

4317J–AVR–08/10

AT90PWM2/3/2B/3B

The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI ports and interrupt

system to continue functioning. The Power-down mode saves the register contents but freezes

the Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. The

ADC Noise Reduction mode stops the CPU and all I/O modules except ADC, to minimize switch-

ing noise during ADC conversions. In Standby mode, the Crystal/Resonator Oscillator is running

while the rest of the device is sleeping. This allows very fast start-up combined with low power

consumption.

The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On-

chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial

interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program

running on the AVR core. The boot program can use any interface to download the application

program in the application Flash memory. Software in the Boot Flash section will continue to run

while the Application Flash section is updated, providing true Read-While-Write operation. By

combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip,

the Atmel AT90PWM2/3 is a powerful microcontroller that provides a highly flexible and cost

effective solution to many embedded control applications.

The AT90PWM2/3 AVR is supported with a full suite of program and system development tools

including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators,

and evaluation kits.

4.2

Pin Descriptions

4.2.1

VCC

Digital supply voltage.

4.2.2

GND

Ground.

4.2.3

Port B (PB7..PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B also serves the functions of various special features of the AT90PWM2/2B/3/3B as listed

on page 68.

4.2.4

Port C (PC7..PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port C output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port C is not available on 24 pins package.

Port C also serves the functions of special features of the AT90PWM2/2B/3/3B as listed on page

70.

AT90PWM2 Datasheet(PDF) 8 Page - ATMEL Corporation

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