AT90PWM2 datasheet(53/361 Pages) ATMEL

53 / 361 page

4317J–AVR–08/10

AT90PWM2/3/2B/3B

The following code example shows one assembly and one C function for changing the time-out

value of the Watchdog Timer.

Note:

1. The example code assumes that the part specific header file is included.

Note: The Watchdog Timer should be reset before any change of the WDP bits, since a change

in the WDP bits can result in a time-out when switching to a shorter time-out period;

9.2.1

Watchdog Timer Control Register - WDTCSR

• Bit 7 - WDIF: Watchdog Interrupt Flag

This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer is config-

ured for interrupt. WDIF is cleared by hardware when executing the corresponding interrupt

handling vector. Alternatively, WDIF is cleared by writing a logic one to the flag. When the I-bit in

SREG and WDIE are set, the Watchdog Time-out Interrupt is executed.

Assembly Code Example

(1)

WDT_Prescaler_Change:

; Turn off global interrupt

cli

; Reset Watchdog Timer

wdr

; Start timed sequence

lds

r16, WDTCSR

ori

r16, (1<<WDCE) | (1<<WDE)

sts

WDTCSR, r16

; --

Got four cycles to set the new values from here -

; Set new prescaler(time-out) value = 64K cycles (~0.5 s)

ldi

r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)

sts

WDTCSR, r16

; --

Finished setting new values, used 2 cycles -

; Turn on global interrupt

sei

ret

C Code Example

(1)

void WDT_Prescaler_Change(void)

{

__disable_interrupt();

__watchdog_reset();

/* Start timed

equence */

WDTCSR |= (1<<WDCE) | (1<<WDE);

/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */

WDTCSR

= (1<<WDE) | (1<<WDP2) | (1<<WDP0);

__enable_interrupt();

}

Bit

76543210

WDIF

WDIE

WDP3

WDCE

WDE

WDP2

WDP1

WDP0

WDTCSR

Read/Write

R/W

Initial Value

0000

000

AT90PWM2 Datasheet(PDF) 53 Page - ATMEL Corporation

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