IMX53CEC datasheet(35/204 Pages) FREESCALE

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Electrical Characteristics

i.MX53xD Applications Processors for Consumer Products, Rev. 2

Freescale Semiconductor

4.3.5

LVDS I/O DC Parameters

The LVDS interface complies with TIA/EIA 644-A standard. See TIA/EIA STANDARD 644-A,

“Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits” for details.

Table 17 shows the Low Voltage Differential Signaling (LVDS) DC electrical characteristics.

4.4

Output Buffer Impedance Characteristics

This section defines the I/O Impedance parameters of the i.MX53xD processor for the following I/O

types:

•

General Purpose I/O (GPIO)

•

Double Data Rate 3 I/O (DDR3) for DDR2/LVDDR2, LPDDR2, and DDR3 modes

•

Ultra High Voltage I/O (UHVIO)

•LVDS I/O

NOTE

Output driver impedance is measured with “long” transmission line of

impedance Ztl attached to I/O pad and incident wave launched into

transmission lime. Rpu/Rpd and Ztl form a voltage divider that defines

specific voltage of incident wave relative to OVDD. Output driver

impedance is calculated from this voltage divider (see Figure 4).

1 Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V,

and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/undershoot must

be controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other

methods. Non-compliance to this specification may affect device reliability or cause permanent damage to the device.

To maintain a valid level, the transitioning edge of the input must sustain a constant slew rate (monotonic) from the current

DC level to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 s. VIL and VIH do not apply

when hysteresis is enabled.

3 Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.

4 Use an off-chip pull resistor of less than 60 k

Ω to override this keeper.

Table 17. LVDS DC Electrical Characteristics

DC Electrical Characteristics

Symbol

Test Conditions

Min

Typ

Max

Unit

Output Differential Voltage

VOD

Rload=100

padP, –padN

250

350

450

Output High Voltage

VOH

1.25

1.375

1.6

Output Low Voltage

VOL

0.9

1.025

1.25

Offset Voltage

VOS

1.125

1.2

1.375

IMX53CEC Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc

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