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STLUX385ATR Datasheet(PDF) 63 Page - STMicroelectronics |
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STLUX385ATR Datasheet(HTML) 63 Page - STMicroelectronics |
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63 / 99 page  DocID024387 Rev 2 63/98 STLUX385A Option bytes Bit 7: AUXTIM CCO Aux timer compatibility features 0: CCO Aux timer enabled 1: CCO Aux timer disabled nAFR_IOMXP1 (alternative Port1 config. reg. protect) nAFR_IOMXP1: not(AFR_IOMXP1) EMC byte protection. AFR_IOMXP2 (alternative Port2 config. reg.) Bit 3-0: RFU reserved; must be kept 0 during register writing for future product compatibility Bit 4: Refer to MSC_IOMXP2 Miscellaneous register field description Section 6.2.3 Bit 7-5: RFU reserved; must be kept 0 during register writing for future product compatibility nAFR_IOMXP2: not(AFR_IOMXP2) EMC byte protection. Offset: 0x004812 Default value: 0xFF 76 5432 1 0 nAUXTIM RFU nSel_p15 nSel_p14 nSel_p13 nSel_p12 nSel_p11 nSel_p10 r r r/w r/w r/w r/w r/w r/w Offset: 0x004811 Default value: 0x00 76 5432 1 0 RFU Sel_p254 RFU RFU RFU RFU rr r r r r Offset: 0x004812 Default value: 0xFF 76 5432 1 0 RFU nSel_p254 RFU RFU RFU RFU rr r r r r |
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